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| author | Alex Bradbury <asb@lowrisc.org> | 2018-11-30 09:23:24 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-11-30 09:23:24 +0000 |
| commit | f612fadc51747e5ec06c040d31e33532cfa00e9e (patch) | |
| tree | 61568738a4fd7c1c01619c0809689d48b9b8ac56 /lldb/packages/Python/lldbsuite/test/functionalities/expr-entry-bp/TestExprEntryBP.py | |
| parent | ceff730fef35a835bfdc649806fb3bdeda907a8e (diff) | |
| download | bcm5719-llvm-f612fadc51747e5ec06c040d31e33532cfa00e9e.tar.gz bcm5719-llvm-f612fadc51747e5ec06c040d31e33532cfa00e9e.zip | |
[docs][AtomicExpandPass] Document the alternate lowering strategy for part-word atomicrmw/cmpxchg
D47882, D48130 and D48131 introduce a new lowering strategy for part-word
atomicrmw/cmpxchg and uses it to lower these operations for the RISC-V target.
Rather than having AtomicExpandPass produce the LL/SC loop in the IR level, it
instead calculates the necessary mask values and inserts a target-specific
intrinsic, which is lowered at a much later stage (after register allocation).
This ensures that architecture-specific restrictions for forward-progress in
LL/SC loops can be guaranteed.
This patch documents this new AtomicExpandPass functionality. See the previous
llvm-dev RFC for more info
<http://lists.llvm.org/pipermail/llvm-dev/2018-June/123993.html>.
Differential Revision: https://reviews.llvm.org/D52234
llvm-svn: 347971
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/functionalities/expr-entry-bp/TestExprEntryBP.py')
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