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authorDavid Green <david.green@arm.com>2019-12-08 09:58:03 +0000
committerDavid Green <david.green@arm.com>2019-12-08 10:37:29 +0000
commit3a6eb5f16054e8c0f41a37542a5fc806016502a0 (patch)
treef46645123431bee65ab83f055038064fdbd6e9cb /lldb/packages/Python/lldbsuite/test/functionalities/exec/secondprog.cpp
parente8716a6df7abad68b6cf81c437a2e0524e88f3ad (diff)
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[ARM] Disable VLD4 under MVE
Alas, using half the available vector registers in a single instruction is just too much for the register allocator to handle. The mve-vldst4.ll test here fails when these instructions are enabled at present. This patch disables the generation of VLD4 and VST4 by adding a mve-max-interleave-factor option, which we currently default to 2. Differential Revision: https://reviews.llvm.org/D71109
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