summaryrefslogtreecommitdiffstats
path: root/lldb/packages/Python/lldbsuite/test/functionalities/command_regex
diff options
context:
space:
mode:
authorArnold Schwaighofer <aschwaighofer@apple.com>2018-03-14 15:44:07 +0000
committerArnold Schwaighofer <aschwaighofer@apple.com>2018-03-14 15:44:07 +0000
commitbf1638daa81cca23073649ec57b21f94c8a57533 (patch)
treebe0c076681f3286afaa111c65eb17e0a1d296c7c /lldb/packages/Python/lldbsuite/test/functionalities/command_regex
parent86ef9ab28f1cb73b792b38a0613823450dbdfe4e (diff)
downloadbcm5719-llvm-bf1638daa81cca23073649ec57b21f94c8a57533.tar.gz
bcm5719-llvm-bf1638daa81cca23073649ec57b21f94c8a57533.zip
SjLjEHPrepare: Don't reg-to-mem swifterror values
swifterror llvm values model the swifterror register as memory at the LLVM IR level. ISel will perform adhoc mem-to-reg on them. swifterror values are constraint in how they can be used. Spilling them to memory is not allowed. SjLjEHPrepare tried to lower swifterror values to memory which is unecessary since the back-end will spill and reload the register as neccessary (as long as clobbering calls are marked as such which is the case here) and further leads to invalid IR because swifterror values can't be stored to memory. rdar://38164004 llvm-svn: 327521
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/functionalities/command_regex')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud