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| author | Cullen Rhodes <cullen.rhodes@arm.com> | 2019-07-31 08:45:57 +0000 |
|---|---|---|
| committer | Cullen Rhodes <cullen.rhodes@arm.com> | 2019-07-31 08:45:57 +0000 |
| commit | e8eb8b9c3adbbe9e8bafcf3f71218ec4a2b9e6eb (patch) | |
| tree | 875bb864113f9bd93aa108f2228761e4f7ea7f22 /lldb/packages/Python/lldbsuite/test/expression_command | |
| parent | ac4869197f89af3b2ae635fb33f1a3059516007d (diff) | |
| download | bcm5719-llvm-e8eb8b9c3adbbe9e8bafcf3f71218ec4a2b9e6eb.tar.gz bcm5719-llvm-e8eb8b9c3adbbe9e8bafcf3f71218ec4a2b9e6eb.zip | |
[AArch64][SVE2] Use destination register as source register
Summary:
This patch fixes a bug in the following instructions that should have been
implemented as destructive. A destructive instruction is an instruction where
one of the source registers also acts as the destination register. Therefore,
the contents of the source register, when the instruction begins execution, are
replaced by the result of the instruction when the instruction completes
execution [1]:
* SRI/SLI
* EORBT/EORTB
* TBX
* Narrowing top instructions
* FP convert precision instructions
These changes are non-functional from the assembler/diassembler point-of-view
but are necessary for correct codegen.
[1] https://static.docs.arm.com/ddi0584/ae/DDI0584A_e_SVE_supp_armv8A.pdf
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D65389
llvm-svn: 367394
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command')
0 files changed, 0 insertions, 0 deletions
