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| author | Chih-Hung Hsieh <chh@google.com> | 2015-12-14 22:08:36 +0000 |
|---|---|---|
| committer | Chih-Hung Hsieh <chh@google.com> | 2015-12-14 22:08:36 +0000 |
| commit | 7993e18e804dbc02f9b6a1bdaefd1193abe0e095 (patch) | |
| tree | 621daf0529d81170b5486c3a6a7d326199468677 /lldb/packages/Python/lldbsuite/test/expression_command | |
| parent | f801290a91521e321887c82b23ef29fdf7389fc6 (diff) | |
| download | bcm5719-llvm-7993e18e804dbc02f9b6a1bdaefd1193abe0e095.tar.gz bcm5719-llvm-7993e18e804dbc02f9b6a1bdaefd1193abe0e095.zip | |
[X86] Part 2 to fix x86-64 fp128 calling convention.
Part 1 was submitted in http://reviews.llvm.org/D15134.
Changes in this part:
* X86RegisterInfo.td, X86RecognizableInstr.cpp: Add FR128 register class.
* X86CallingConv.td: Pass f128 values in XMM registers or on stack.
* X86InstrCompiler.td, X86InstrInfo.td, X86InstrSSE.td:
Add instruction selection patterns for f128.
* X86ISelLowering.cpp:
When target has MMX registers, configure MVT::f128 in FR128RegClass,
with TypeSoftenFloat action, and custom actions for some opcodes.
Add missed cases of MVT::f128 in places that handle f32, f64, or vector types.
Add TODO comment to support f128 type in inline assembly code.
* SelectionDAGBuilder.cpp:
Fix infinite loop when f128 type can have
VT == TLI.getTypeToTransformTo(Ctx, VT).
* Add unit tests for x86-64 fp128 type.
Differential Revision: http://reviews.llvm.org/D11438
llvm-svn: 255558
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command')
0 files changed, 0 insertions, 0 deletions
