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| author | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 21:23:45 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 21:23:45 +0000 |
| commit | efd88857724df8e865fcf6a28103b230971db9de (patch) | |
| tree | 6a4192d331293660e10e573c726dcdac27793949 /lldb/packages/Python/lldbsuite/test/expression_command/timeout/wait-a-while.cpp | |
| parent | 76a2e60e593784314cc87b408796c6b4cd50d810 (diff) | |
| download | bcm5719-llvm-efd88857724df8e865fcf6a28103b230971db9de.tar.gz bcm5719-llvm-efd88857724df8e865fcf6a28103b230971db9de.zip | |
[InstSimplify] fold negation of sign-bit
0 - X --> X, if X is 0 or the minimum signed value
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW
I noticed this pattern might be created in the backend after the change from D25485,
so we'll want to add a similar fold for the DAG.
The use of computeKnownBits in InstSimplify may be something to investigate if the
compile time of InstSimplify is noticeable. We could replace computeKnownBits with
specific pattern matchers or limit the recursion.
Differential Revision: https://reviews.llvm.org/D25785
llvm-svn: 284649
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/timeout/wait-a-while.cpp')
0 files changed, 0 insertions, 0 deletions
