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author | Craig Topper <craig.topper@intel.com> | 2017-09-20 21:18:17 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-09-20 21:18:17 +0000 |
commit | 562bf99ee61dbc28901253590780981c45e38e72 (patch) | |
tree | a31aa230492206272ba474b5e350a46baad110f5 /lldb/packages/Python/lldbsuite/test/expression_command/timeout/wait-a-while.cpp | |
parent | 9b593a69385034e11afb41e87b4d4752e88aff37 (diff) | |
download | bcm5719-llvm-562bf99ee61dbc28901253590780981c45e38e72.tar.gz bcm5719-llvm-562bf99ee61dbc28901253590780981c45e38e72.zip |
[InstCombine] Handle (X & C2) < C1 --> (X & C2) == 0
We already did (X & C2) > C1 --> (X & C2) != 0, if any bit set in (X & C2) will produce a result greater than C1. But there is an equivalent inverse condition with <= C1 (which will be canonicalized to < C1+1)
Differential Revision: https://reviews.llvm.org/D38065
llvm-svn: 313819
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/timeout/wait-a-while.cpp')
0 files changed, 0 insertions, 0 deletions