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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-06-07 10:27:15 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-06-07 10:27:15 +0000
commitdb9893fb90c29783d2e1fc6195dc8e9a6a149b2a (patch)
treeb421ef594c1952e91a793140e01109ebc500c0c8 /lldb/packages/Python/lldbsuite/test/expression_command/timeout/TestCallWithTimeout.py
parentd9e1a61d3149ef54d6ce84e0268ae63f32bba181 (diff)
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[InstCombine][AVX2] Add support for simplifying AVX2 per-element shifts to native shifts
Unlike native shifts, the AVX2 per-element shift instructions VPSRAV/VPSRLV/VPSLLV handle out of range shift values (logical shifts set the result to zero, arithmetic shifts splat the sign bit). If the shift amount is constant we can sometimes convert these instructions to native shifts: 1 - if all shift amounts are in range then the conversion is trivial. 2 - out of range arithmetic shifts can be clamped to the (bitwidth - 1) (a legal shift amount) before conversion. 3 - logical shifts just return zero if all elements have out of range shift amounts. In addition, UNDEF shift amounts are handled - either as an UNDEF shift amount in a native shift or as an UNDEF in the logical 'all out of range' zero constant special case for logical shifts. Differential Revision: http://reviews.llvm.org/D19675 llvm-svn: 271996
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