summaryrefslogtreecommitdiffstats
path: root/lldb/packages/Python/lldbsuite/test/expression_command/macros/TestMacros.py
diff options
context:
space:
mode:
authorJeremy Morse <jeremy.morse.llvm@gmail.com>2018-05-08 09:18:01 +0000
committerJeremy Morse <jeremy.morse.llvm@gmail.com>2018-05-08 09:18:01 +0000
commit4f799c027e09dafa0d1188509b256f75da3609a5 (patch)
tree81d48449f90dba915d54028b36cb6e1f61792f96 /lldb/packages/Python/lldbsuite/test/expression_command/macros/TestMacros.py
parentc47f79928952f1925b8c8ccbc6c53863bddcf998 (diff)
downloadbcm5719-llvm-4f799c027e09dafa0d1188509b256f75da3609a5.tar.gz
bcm5719-llvm-4f799c027e09dafa0d1188509b256f75da3609a5.zip
[X86] Mark all byval parameters as aliased
This is a fix for PR30290: by marking all byval stack slots as being aliased, the instruction scheduler is more conservative about rescheduling memory accesses to such stack slots as an LLVM Value* might alias it. This fixes errors such as in the patched test case, where reads and writes to a data structure are illegally mixed. This could be fixed better in the future with better analysis for the instruction scheduler to know what Values alias what stack slots. Differential Revision: https://reviews.llvm.org/D45022 llvm-svn: 331749
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/macros/TestMacros.py')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud