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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-09 06:19:12 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-09 06:19:12 +0000
commit27c062932a8c3b44fe5d4c4fdbc0310cc32b61c6 (patch)
tree88180af32faea184738d4ee76428f3b7a0014fe5 /lldb/packages/Python/lldbsuite/test/expression_command/macros/TestMacros.py
parent2c84f908afc851a1ba83c6a8471a62db81475ef8 (diff)
downloadbcm5719-llvm-27c062932a8c3b44fe5d4c4fdbc0310cc32b61c6.tar.gz
bcm5719-llvm-27c062932a8c3b44fe5d4c4fdbc0310cc32b61c6.zip
AMDGPU: Select i16 instructions to VOP3 forms
These were selecting directly to the VOP2 form instead of VOP3 like the i32 instructions. Fixes regressions in future commits where an immediate isn't folded because it was initially used for the second operand. Because uniform 16-bit operations are promoted to i32, it's difficult to get a simple testcase where this matters. Fold failures in SIFoldOperands here tend to be hidden by commute and fold in SIShrinkInstructions. llvm-svn: 289189
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/macros/TestMacros.py')
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