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| author | Simon Atanasyan <simon@atanasyan.com> | 2019-08-28 12:35:53 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2019-08-28 12:35:53 +0000 |
| commit | f46ba4f0771be75016b3a2cde6779e5d0210350f (patch) | |
| tree | 6692023ef73148b7508462d8ad5072d506193605 /lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py | |
| parent | 95686fa898e62c57529a649758e7f735d851c00d (diff) | |
| download | bcm5719-llvm-f46ba4f0771be75016b3a2cde6779e5d0210350f.tar.gz bcm5719-llvm-f46ba4f0771be75016b3a2cde6779e5d0210350f.zip | |
[mips] Use less registers to load address of TargetExternalSymbol
There is no pattern matched `add hi, (MipsLo texternalsym)`. As a result,
loading an address of 32-bit symbol requires two registers and one more
additional instruction:
```
addiu $1, $zero, %lo(foo)
lui $2, %hi(foo)
addu $25, $2, $1
```
This patch adds the missed pattern and enables generation more effective
set of instructions:
```
lui $1, %hi(foo)
addiu $25, $1, %lo(foo)
```
Differential Revision: https://reviews.llvm.org/D66771
llvm-svn: 370196
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py')
0 files changed, 0 insertions, 0 deletions
