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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-10-01 14:26:11 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-10-01 14:26:11 +0000 |
commit | ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e (patch) | |
tree | b0e80cb74d6896c857bf9e910957c0ddaa2080d4 /lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py | |
parent | 45535cb1861266ad40e536dbdefd8984e186bc5f (diff) | |
download | bcm5719-llvm-ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e.tar.gz bcm5719-llvm-ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e.zip |
[X86][SSE] Enable commutation from MOVSD/MOVSS to BLENDPD/BLENDPS on SSE41+ targets
Instead of selecting between MOVSD/MOVSS and BLENDPD/BLENDPS at shuffle lowering by subtarget this will help us select the instruction based on actual commutation requirements.
We could possibly add BLENDPD/BLENDPS -> MOVSD/MOVSS commutation and MOVSD/MOVSS memory folding using a similar approach if it proves useful
I avoided adding AVX512 handling as I'm not sure when we should be making use of VBLENDPD/VBLENDPS on EVEX targets
llvm-svn: 283037
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py')
0 files changed, 0 insertions, 0 deletions