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| author | Craig Topper <craig.topper@intel.com> | 2018-10-25 21:16:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-10-25 21:16:06 +0000 |
| commit | 813064bf4d89758550b36d98d37846ab947135fd (patch) | |
| tree | 421daab2b2044eb2165ae4da2c73d61b99b00860 /lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter-phi-nodes/TestIRInterpreterPHINodes.py | |
| parent | 5be9e6de8998b3b6704e908fdd57ae6355a599b4 (diff) | |
| download | bcm5719-llvm-813064bf4d89758550b36d98d37846ab947135fd.tar.gz bcm5719-llvm-813064bf4d89758550b36d98d37846ab947135fd.zip | |
[X86] Change X86 backend to look for 'min-legal-vector-width' attribute instead of 'required-vector-width' when determining whether 512-bit vectors should be legal.
The required-vector-width attribute was only used for backend testing and has never been generated by clang.
I believe clang is now generating min-legal-vector-width for vector uses in user code.
With this I believe passing -mprefer-vector-width=256 to clang should prevent use of zmm registers in the generated assembly unless the user used a 512-bit intrinsic in their source code.
llvm-svn: 345317
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/ir-interpreter-phi-nodes/TestIRInterpreterPHINodes.py')
0 files changed, 0 insertions, 0 deletions
