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| author | Craig Topper <craig.topper@intel.com> | 2019-08-20 20:20:04 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-08-20 20:20:04 +0000 |
| commit | 3a2b08e6c90c10fee341f3be257397dbb6034ecb (patch) | |
| tree | fab83a46260132af4a7e58e3a3f5d16fee014c2e /lldb/packages/Python/lldbsuite/test/expression_command/context-object-objc | |
| parent | 8f5e1755ca385566c0352a9bd292218cebfd3d0b (diff) | |
| download | bcm5719-llvm-3a2b08e6c90c10fee341f3be257397dbb6034ecb.tar.gz bcm5719-llvm-3a2b08e6c90c10fee341f3be257397dbb6034ecb.zip | |
[X86] Add a DAG combine to transform (i8 (bitcast (v8i1 (extract_subvector (v16i1 X), 0)))) -> (i8 (trunc (i16 (bitcast (v16i1 X))))) on KNL target
Without AVX512DQ we don't have KMOVB so we can't really copy 8-bits of a k-register to a GPR. We have to copy 16 bits instead. We do this even if the DAG copy is from v8i1->v16i1. If we detect the (i8 (bitcast (v8i1 (extract_subvector (v16i1 X), 0)))) we should rewrite the types to match the copy we do support. By doing this, we can help known bits to propagate without losing the upper 8 bits of the input to the extract_subvector. This allows some zero extends to be removed since we have an isel pattern to use kmovw for (zero_extend (i16 (bitcast (v16i1 X))).
Differential Revision: https://reviews.llvm.org/D66489
llvm-svn: 369434
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/context-object-objc')
0 files changed, 0 insertions, 0 deletions
