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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-24 15:50:29 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-24 15:50:29 +0000
commite3a676e9adba668a7da944766218e98dd4b2c10a (patch)
tree632a983ae9fe72b635cf72262bf2e9a0cbe6dce3 /lldb/packages/Python/lldbsuite/test/expression_command/context-object-objc/TestContextObjectObjc.py
parent3260ef16bbdecc391d7da8fe3bbe19585f6ccb19 (diff)
downloadbcm5719-llvm-e3a676e9adba668a7da944766218e98dd4b2c10a.tar.gz
bcm5719-llvm-e3a676e9adba668a7da944766218e98dd4b2c10a.zip
CodeGen: Introduce a class for registers
Avoids using a plain unsigned for registers throughoug codegen. Doesn't attempt to change every register use, just something a little more than the set needed to build after changing the return type of MachineOperand::getReg(). llvm-svn: 364191
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/context-object-objc/TestContextObjectObjc.py')
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