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authorSimon Cook <simon.cook@embecosm.com>2019-07-31 09:07:21 +0000
committerSimon Cook <simon.cook@embecosm.com>2019-07-31 09:07:21 +0000
commit8d7ec4d644d29a7ffbf6d9e9a533c6d048efd545 (patch)
treeb3f3a3c7b7e1c6774c63a1c930e88edb4b9fecb6 /lldb/packages/Python/lldbsuite/test/expression_command/completion-crash-lambda
parent17230e026df78e329f2d0dc120254693df723c85 (diff)
downloadbcm5719-llvm-8d7ec4d644d29a7ffbf6d9e9a533c6d048efd545.tar.gz
bcm5719-llvm-8d7ec4d644d29a7ffbf6d9e9a533c6d048efd545.zip
[RISCV] Add support for lowering floating point inlineasm clobbers
This adds the required extension to RISC-V's getRegForInlineAsmConstraint in order to be able to correctly distringuish between the 32 and 64-bit floating point registers when the generic fX name appears in inlineasm clobber contraints. It also adds a check to validate that callee saved floating point registers are only saved in this case when a hard-float ABI is selected. Differential Revision: https://reviews.llvm.org/D64751 llvm-svn: 367397
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