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authorSanjay Patel <spatel@rotateright.com>2018-12-03 21:57:35 +0000
committerSanjay Patel <spatel@rotateright.com>2018-12-03 21:57:35 +0000
commitd24f63477d5b54bb5e8207e994c197aae3f91295 (patch)
tree2b877466c27baf3b68484989075d5c767c28ba7b /lldb/packages/Python/lldbsuite/test/expression_command/call-function/main.cpp
parentf76884b0d3b96a151d1c631685f9770d45630173 (diff)
downloadbcm5719-llvm-d24f63477d5b54bb5e8207e994c197aae3f91295.tar.gz
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[DAGCombiner] narrow truncated vector binops when legal
This is the smallest vector enhancement I could find to D54640. Here, we're allowing narrowing to only legal vector ops because we'll see regressions without that. All of the test diffs are wins from what I can tell. With AVX/AVX512, we can shrink ymm/zmm ops to xmm. x86 vector multiplies are the problem case that we're avoiding due to the patchwork ISA, and it's not clear to me if we can dance around those regressions using TLI hooks or if we need preliminary patches to plug those holes. Differential Revision: https://reviews.llvm.org/D55126 llvm-svn: 348195
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/call-function/main.cpp')
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