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authorDehao Chen <dehao@google.com>2016-06-28 21:19:34 +0000
committerDehao Chen <dehao@google.com>2016-06-28 21:19:34 +0000
commit8cd84aaa6ff06f693226780036a173ce4bf73635 (patch)
treeb0faaf29b633825c74c222d0f6facd574fea7f04 /lldb/packages/Python/lldbsuite/test/expression_command/call-function/TestCallUserDefinedFunction.py
parent92b2e8a2958e22dbec732b34d828ebe6a9f82b59 (diff)
downloadbcm5719-llvm-8cd84aaa6ff06f693226780036a173ce4bf73635.tar.gz
bcm5719-llvm-8cd84aaa6ff06f693226780036a173ce4bf73635.zip
Relax the clearance calculating for breaking partial register dependency.
Summary: LLVM assumes that large clearance will hide the partial register spill penalty. But in our experiment, 16 clearance is too small. As the inserted XOR is normally fairly cheap, we should have a higher clearance threshold to aggressively insert XORs that is necessary to break partial register dependency. Reviewers: wmi, davidxl, stoklund, zansari, myatsina, RKSimon, DavidKreitzer, mkuper, joerg, spatel Subscribers: davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D21560 llvm-svn: 274068
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