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author | Alex Bradbury <asb@lowrisc.org> | 2019-01-17 10:04:39 +0000 |
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committer | Alex Bradbury <asb@lowrisc.org> | 2019-01-17 10:04:39 +0000 |
commit | 07f1c62371c57a66b23933811a585e201dde8e27 (patch) | |
tree | cfe1f7b460d5407f07bd19e954cd8d4e97bbc3e5 /lldb/packages/Python/lldbsuite/test/expression_command/call-function/TestCallUserDefinedFunction.py | |
parent | b694030647254e6ad782d49872d3c31be40ec62f (diff) | |
download | bcm5719-llvm-07f1c62371c57a66b23933811a585e201dde8e27.tar.gz bcm5719-llvm-07f1c62371c57a66b23933811a585e201dde8e27.zip |
[RISCV] Add codegen support for RV64A
In order to support codegen RV64A, this patch:
* Introduces masked atomics intrinsics for atomicrmw operations and cmpxchg
that use the i64 type. These are ultimately lowered to masked operations
using lr.w/sc.w, but we need to use these alternate intrinsics for RV64
because i32 is not legal
* Modifies RISCVExpandPseudoInsts.cpp to handle PseudoAtomicLoadNand64 and
PseudoCmpXchg64
* Modifies the AtomicExpandPass hooks in RISCVTargetLowering to sext/trunc as
needed for RV64 and to select the i64 intrinsic IDs when necessary
* Adds appropriate patterns to RISCVInstrInfoA.td
* Updates test/CodeGen/RISCV/atomic-*.ll to show RV64A support
This ends up being a fairly mechanical change, as the logic for RV32A is
effectively reused.
Differential Revision: https://reviews.llvm.org/D53233
llvm-svn: 351422
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/call-function/TestCallUserDefinedFunction.py')
0 files changed, 0 insertions, 0 deletions