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authorMarcin Koscielnicki <koriakin@0x04.net>2016-04-25 15:43:44 +0000
committerMarcin Koscielnicki <koriakin@0x04.net>2016-04-25 15:43:44 +0000
commit1c1af6ef77406a65c6828d2b941f6939596845e9 (patch)
tree99d6c82202a70ae51755856ddbb18502664daa06 /lldb/packages/Python/lldbsuite/test/expression_command/call-function/TestCallStopAndContinue.py
parentc2dd5d223ac0c5a1cdc113e23c13cbf3252a70b4 (diff)
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[PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
visitAND, when folding and (load) forgets to check which output of an indexed load is involved, happily folding the updated address output on the following testcase: target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu" %typ = type { i32, i32 } define signext i32 @_Z8access_pP1Tc(%typ* %p, i8 zeroext %type) { %b = getelementptr inbounds %typ, %typ* %p, i64 0, i32 1 %1 = load i32, i32* %b, align 4 %2 = ptrtoint i32* %b to i64 %3 = and i64 %2, -35184372088833 %4 = inttoptr i64 %3 to i32* %_msld = load i32, i32* %4, align 4 %zzz = add i32 %1, %_msld ret i32 %zzz } Fix this by checking ResNo. I've found a few more places that currently neglect to check for indexed load, and tightened them up as well, but I don't have test cases for them. In fact, they might not be triggerable at all, at least with current targets. Still, better safe than sorry. Differential Revision: http://reviews.llvm.org/D19202 llvm-svn: 267420
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