summaryrefslogtreecommitdiffstats
path: root/lldb/packages/Python/lldbsuite/test/dotest.py
diff options
context:
space:
mode:
authorRenato Golin <renato.golin@linaro.org>2015-12-08 18:10:58 +0000
committerRenato Golin <renato.golin@linaro.org>2015-12-08 18:10:58 +0000
commit412ee3d45dc54b44e603ed5851f2f0f976c1e19f (patch)
tree7094bfff35dd0013894b326ccccb989000b3f68a /lldb/packages/Python/lldbsuite/test/dotest.py
parentddaa4b4990ba32282dc2c91b7251aff50f9f3dc6 (diff)
downloadbcm5719-llvm-412ee3d45dc54b44e603ed5851f2f0f976c1e19f.tar.gz
bcm5719-llvm-412ee3d45dc54b44e603ed5851f2f0f976c1e19f.zip
[ARM] Allowing SP/PC for AND/BIC mod_imm_not
AND/BIC instructions do accept SP/PC, so the register class should be more generic (rGPR -> GPR) to cope with that case. Adding more tests. llvm-svn: 255034
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/dotest.py')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud