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authorCraig Topper <craig.topper@intel.com>2019-09-02 20:16:30 +0000
committerCraig Topper <craig.topper@intel.com>2019-09-02 20:16:30 +0000
commit45cd1851097c61b7eee73b93fee4f09fc2a57d3c (patch)
treef064177a259e0077b38d7db947253fe8a5a44897 /lldb/packages/Python/lldbsuite/test/commands
parenta5fd8d8f47d761a9307696987191bb87f9c06d9e (diff)
downloadbcm5719-llvm-45cd1851097c61b7eee73b93fee4f09fc2a57d3c.tar.gz
bcm5719-llvm-45cd1851097c61b7eee73b93fee4f09fc2a57d3c.zip
[X86] Enable fp128 as a legal type with SSE1 rather than with MMX.
FP128 values are passed in xmm registers so should be asssociated with an SSE feature rather than MMX which uses a different set of registers. llc enables sse1 and sse2 by default with x86_64. But does not enable mmx. Clang enables all 3 features by default. I've tried to add command lines to test with -sse where possible, but any test that returns a value in an xmm register fails with a fatal error with -sse since we have no defined ABI for that scenario. llvm-svn: 370682
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