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| author | David Green <david.green@arm.com> | 2019-09-17 15:32:28 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2019-09-17 15:32:28 +0000 |
| commit | 91724b85307609f56eb2b547203107a578ea3fee (patch) | |
| tree | 294e558c28202285d2a3b0672cfed74c761ef8de /lldb/packages/Python/lldbsuite/test/commands/expression/inline-namespace/TestInlineNamespace.py | |
| parent | c42ca16cfa07da901b00940397e1a321623fd577 (diff) | |
| download | bcm5719-llvm-91724b85307609f56eb2b547203107a578ea3fee.tar.gz bcm5719-llvm-91724b85307609f56eb2b547203107a578ea3fee.zip | |
[ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores
We were previously using the SelectT2AddrModeImm7 for both normal and narrowing
MVE loads/stores. As the narrowing instructions do not accept sp as a register,
it makes little sense to optimise a FrameIndex into the load, only to have to
recover that later on. This adds a SelectTAddrModeImm7 which does not do that
folding, and uses it for narrowing load/store patterns.
Differential Revision: https://reviews.llvm.org/D67489
llvm-svn: 372134
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/commands/expression/inline-namespace/TestInlineNamespace.py')
0 files changed, 0 insertions, 0 deletions
