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authorDavid Green <david.green@arm.com>2019-09-17 15:23:09 +0000
committerDavid Green <david.green@arm.com>2019-09-17 15:23:09 +0000
commit22a2209433a40508c2866ce8f547fcf319f83186 (patch)
treee248129722c58931288740ea0c72fd0051180681 /lldb/packages/Python/lldbsuite/test/commands/expression/inline-namespace/TestInlineNamespace.py
parentd0cc0a39be47cabd1325395197a3b7276f7b9fd9 (diff)
downloadbcm5719-llvm-22a2209433a40508c2866ce8f547fcf319f83186.tar.gz
bcm5719-llvm-22a2209433a40508c2866ce8f547fcf319f83186.zip
[ARM] Reserve an emergency spill slot for fp16 addressing modes that need it
Similar to D67327, but this time for the FP16 VLDR and VSTR instructions that use the AddrMode5FP16 addressing mode. We need to reserve an emergency spill slot for instructions that will be out of range to use sp directly. AddrMode5FP16 is 8 bits with a scale of 2. Differential Revision: https://reviews.llvm.org/D67483 llvm-svn: 372132
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/commands/expression/inline-namespace/TestInlineNamespace.py')
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