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authorCraig Topper <craig.topper@intel.com>2019-10-10 19:40:44 +0000
committerCraig Topper <craig.topper@intel.com>2019-10-10 19:40:44 +0000
commit0e561437c5873a0406fab6dd7e1ba8247847bb92 (patch)
treef62dd063da09d3b7d17441f59cfd924c32ef18ac /lldb/packages/Python/lldbsuite/test/commands/expression/context-object-objc
parentff5640caea906c61f9ecc48e14b37eacdde3c521 (diff)
downloadbcm5719-llvm-0e561437c5873a0406fab6dd7e1ba8247847bb92.tar.gz
bcm5719-llvm-0e561437c5873a0406fab6dd7e1ba8247847bb92.zip
[X86] Use packusdw+vpmovuswb to implement v16i32->V16i8 that clamps signed inputs to be between 0 and 255 when zmm registers are disabled on SKX.
If we've disable zmm registers, the v16i32 will need to be split. This split will propagate through min/max the truncate. This creates two sequences that need to be concatenated back to v16i8. We can instead use packusdw to do part of the clamping, truncating, and concatenating all at once. Then we can use a vpmovuswb to finish off the clamp. Differential Revision: https://reviews.llvm.org/D68763 llvm-svn: 374431
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