diff options
author | Jessica Paquette <jpaquette@apple.com> | 2020-01-08 10:57:44 -0800 |
---|---|---|
committer | Jessica Paquette <jpaquette@apple.com> | 2020-01-09 12:15:56 -0800 |
commit | 9949b1a1753aa0f229c5b55ea01ec96f48164d9e (patch) | |
tree | 7674ef0b0e32e0a938a0716f66f0625f8a7a9050 /lldb/packages/Python/lldbsuite/test/commands/command/script/main.cpp | |
parent | b35f5d4914c979282010c0618a331d11a58493ac (diff) | |
download | bcm5719-llvm-9949b1a1753aa0f229c5b55ea01ec96f48164d9e.tar.gz bcm5719-llvm-9949b1a1753aa0f229c5b55ea01ec96f48164d9e.zip |
[GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns
This adds support for selecting a large chunk of the load/store *roW patterns.
This is pretty much a straight port of AArch64DAGToDAGISel::SelectAddrModeWRO
into GISel. The code is very similar to the XRO code. The main difference is
that in the *roW patterns, we want to try and fold in an extend, and *possibly*
a shift along with it. A good portion of this patch is refactoring the existing
XRO code.
- Add selectAddrModeWRO
- Factor out the code from selectAddrModeShiftedExtendXReg which is used by both
selectAddrModeXRO and selectAddrModeWRO into selectExtendedSHL.
This is similar to the function of the same name in AArch64DAGToDAGISel.
- Add support for extends to the factored out code in selectExtendedSHL.
- Teach getExtendTypeForInst how to handle AND masks that are intended to be
used in loads/stores (necessary for this addressing mode.)
- Make getExtendTypeForInst not static because moving it made an annoying diff
and I wanted to have the WRO/XRO functions close to each other while I was
writing the code.
Differential Revision: https://reviews.llvm.org/D72426
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/commands/command/script/main.cpp')
0 files changed, 0 insertions, 0 deletions