Revert [test] Split LLDB tests into API, Shell & Unit

as it appears to have broken check-lldb.

This reverts r374184 (git commit 22314179f0660c172514b397060fd8f34b586e82)

llvm-svn: 374187

1 files changed, 222 insertions, 0 deletions

diff --git a/lldb/lit/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit b/lldb/lit/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
new file mode 100644
index 00000000000..4af8b658742
--- /dev/null
+++ b/lldb/lit/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
@@ -0,0 +1,222 @@
+target variable BFalse
+target variable BTrue
+target variable CA
+target variable CZ
+target variable SCa
+target variable SCz
+target variable UC24
+target variable UC42
+target variable C16_24
+target variable C32_42
+target variable WC1
+target variable WCP
+target variable SMax
+target variable SMin
+target variable USMax
+target variable USMin
+target variable IMax
+target variable IMin
+target variable UIMax
+target variable UIMin
+target variable LMax
+target variable LMin
+target variable ULMax
+target variable ULMin
+target variable LLMax
+target variable LLMin
+target variable ULLMax
+target variable ULLMin
+target variable F
+target variable D
+
+target variable CBFalse
+target variable CBTrue
+target variable CCA
+target variable CCZ
+target variable CSCa
+target variable CSCz
+target variable CUC24
+target variable CUC42
+target variable CC16_24
+target variable CC32_42
+target variable CWC1
+target variable CWCP
+target variable CSMax
+target variable CSMin
+target variable CUSMax
+target variable CUSMin
+target variable CIMax
+target variable CIMin
+target variable CUIMax
+target variable CUIMin
+target variable CLMax
+target variable CLMin
+target variable CULMax
+target variable CULMin
+target variable CLLMax
+target variable CLLMin
+target variable CULLMax
+target variable CULLMin
+target variable CF
+target variable CD
+
+target variable ConstexprBFalse
+target variable ConstexprBTrue
+target variable ConstexprCA
+target variable ConstexprCZ
+target variable ConstexprSCa
+target variable ConstexprSCz
+target variable ConstexprUC24
+target variable ConstexprUC42
+target variable ConstexprC16_24
+target variable ConstexprC32_42
+target variable ConstexprWC1
+target variable ConstexprWCP
+target variable ConstexprSMax
+target variable ConstexprSMin
+target variable ConstexprUSMax
+target variable ConstexprUSMin
+target variable ConstexprIMax
+target variable ConstexprIMin
+target variable ConstexprUIMax
+target variable ConstexprUIMin
+target variable ConstexprLMax
+target variable ConstexprLMin
+target variable ConstexprULMax
+target variable ConstexprULMin
+target variable ConstexprLLMax
+target variable ConstexprLLMin
+target variable ConstexprULLMax
+target variable ConstexprULLMin
+target variable ConstexprF
+target variable ConstexprD
+
+target variable PBFalse
+target variable PBTrue
+target variable PCA
+target variable PCZ
+target variable PSCa
+target variable PSCz
+target variable PUC24
+target variable PUC42
+target variable PC16_24
+target variable PC32_42
+target variable PWC1
+target variable PWCP
+target variable PSMax
+target variable PSMin
+target variable PUSMax
+target variable PUSMin
+target variable PIMax
+target variable PIMin
+target variable PUIMax
+target variable PUIMin
+target variable PLMax
+target variable PLMin
+target variable PULMax
+target variable PULMin
+target variable PLLMax
+target variable PLLMin
+target variable PULLMax
+target variable PULLMin
+target variable PF
+target variable PD
+
+target variable CPBFalse
+target variable CPBTrue
+target variable CPCA
+target variable CPCZ
+target variable CPSCa
+target variable CPSCz
+target variable CPUC24
+target variable CPUC42
+target variable CPC16_24
+target variable CPC32_42
+target variable CPWC1
+target variable CPWCP
+target variable CPSMax
+target variable CPSMin
+target variable CPUSMax
+target variable CPUSMin
+target variable CPIMax
+target variable CPIMin
+target variable CPUIMax
+target variable CPUIMin
+target variable CPLMax
+target variable CPLMin
+target variable CPULMax
+target variable CPULMin
+target variable CPLLMax
+target variable CPLLMin
+target variable CPULLMax
+target variable CPULLMin
+target variable CPF
+target variable CPD
+
+target variable RBFalse
+target variable RBTrue
+target variable RCA
+target variable RCZ
+target variable RSCa
+target variable RSCz
+target variable RUC24
+target variable RUC42
+target variable RSMax
+target variable RSMin
+target variable RUSMax
+target variable RUSMin
+target variable RIMax
+target variable RIMin
+target variable RUIMax
+target variable RUIMin
+target variable RLMax
+target variable RLMin
+target variable RULMax
+target variable RULMin
+target variable RLLMax
+target variable RLLMin
+target variable RULLMax
+target variable RULLMin
+target variable RF
+target variable RD
+
+target variable CRBFalse
+target variable CRBTrue
+target variable CRCA
+target variable CRCZ
+target variable CRSCa
+target variable CRSCz
+target variable CRUC24
+target variable CRUC42
+target variable CRSMax
+target variable CRSMin
+target variable CRUSMax
+target variable CRUSMin
+target variable CRIMax
+target variable CRIMin
+target variable CRUIMax
+target variable CRUIMin
+target variable CRLMax
+target variable CRLMin
+target variable CRULMax
+target variable CRULMin
+target variable CRLLMax
+target variable CRLLMin
+target variable CRULLMax
+target variable CRULLMin
+target variable CRF
+target variable CRD
+
+target variable RC16_24
+target variable RC32_42
+target variable RWC1
+target variable RWCP
+target variable CRC16_24
+target variable CRC32_42
+target variable CRWC1
+target variable CRWCP
+
+target modules dump ast
+
+
+quit
\ No newline at end of file