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| author | Greg Clayton <gclayton@apple.com> | 2013-12-13 00:35:21 +0000 |
|---|---|---|
| committer | Greg Clayton <gclayton@apple.com> | 2013-12-13 00:35:21 +0000 |
| commit | 25eec2cc75ca6ce139e138550bd11f64bf5966a7 (patch) | |
| tree | f2e6ecb7a2a882247ec0ff45e58e7bb56a6be5c4 /lldb/examples/python | |
| parent | 5e8dce4dbfd6f3e3366948ec22b82b952ae2b108 (diff) | |
| download | bcm5719-llvm-25eec2cc75ca6ce139e138550bd11f64bf5966a7.tar.gz bcm5719-llvm-25eec2cc75ca6ce139e138550bd11f64bf5966a7.zip | |
Fix to only update the offset for concrete registers (ones that don't have 'slice' or 'composite' key/value pairs).
llvm-svn: 197191
Diffstat (limited to 'lldb/examples/python')
| -rw-r--r-- | lldb/examples/python/x86_64_target_definition.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lldb/examples/python/x86_64_target_definition.py b/lldb/examples/python/x86_64_target_definition.py index 177095dbecd..3a1290b62f8 100644 --- a/lldb/examples/python/x86_64_target_definition.py +++ b/lldb/examples/python/x86_64_target_definition.py @@ -328,6 +328,7 @@ def get_target_definition (): # Only fill in the offset if there is no 'slice' in the register info if 'slice' not in reg_info and 'composite' not in reg_info: reg_info['offset'] = offset + offset += reg_info['bitsize']/8 # Set the GCC/DWARF register number for this register if it has one reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name) @@ -345,7 +346,6 @@ def get_target_definition (): if reg_num != LLDB_INVALID_REGNUM: reg_info['gdb'] = reg_num - offset += reg_info['bitsize']/8 g_target_definition['sets'] = ['General Purpose Registers', 'Floating Point Registers'] g_target_definition['registers'] = x86_64_register_infos g_target_definition['host-info'] = { 'triple' : 'x86_64-apple-macosx', 'endian': eByteOrderLittle } |

