[Mips] Create special PLT entry in case of MIPS R6 ABI

llvm-svn: 232806

2 files changed, 141 insertions, 1 deletions

diff --git a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
index 81d7a3d94a6..bf69b14f0ab 100644
--- a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
+++ b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
@@ -78,6 +78,14 @@ static const uint8_t micromipsPltAtomContent[] = {
   0x02, 0x0f              // move $24, $2
 };
 
+// R6 PLT entry
+static const uint8_t mipsR6PltAAtomContent[] = {
+  0x00, 0x00, 0x0f, 0x3c, // lui   $15, %hi(.got.plt entry)
+  0x00, 0x00, 0xf9, 0x8d, // l[wd] $25, %lo(.got.plt entry)($15)
+  0x09, 0x00, 0x20, 0x03, // jr    $25
+  0x00, 0x00, 0xf8, 0x25  // addiu $24, $15, %lo(.got.plt entry)
+};
+
 // LA25 stub entry
 static const uint8_t mipsLA25AtomContent[] = {
   0x00, 0x00, 0x19, 0x3c, // lui   $25, %hi(func)
@@ -214,6 +222,15 @@ public:
   }
 };
 
+class PLTR6Atom : public PLTAAtom {
+public:
+  PLTR6Atom(const GOTPLTAtom *got, const File &f) : PLTAAtom(got, f) {}
+
+  ArrayRef<uint8_t> rawContent() const override {
+    return llvm::makeArrayRef(mipsR6PltAAtomContent);
+  }
+};
+
 class PLTMicroAtom : public PLTAtom {
 public:
   PLTMicroAtom(const GOTPLTAtom *got, const File &f) : PLTAtom(f, ".plt") {
@@ -388,6 +405,8 @@ private:
   bool mightBeDynamic(const MipsELFDefinedAtom<ELFT> &atom,
                       Reference::KindValue refKind) const;
   bool hasPLTEntry(const Atom *atom) const;
+
+  bool isR6Target() const;
 };
 
 template <typename ELFT>
@@ -638,6 +657,16 @@ bool RelocationPass<ELFT>::hasPLTEntry(const Atom *atom) const {
   return _pltRegMap.count(atom) || _pltMicroMap.count(atom);
 }
 
+template <typename ELFT> bool RelocationPass<ELFT>::isR6Target() const {
+  switch (_ctx.getMergedELFFlags() & EF_MIPS_ARCH) {
+  case EF_MIPS_ARCH_32R6:
+  case EF_MIPS_ARCH_64R6:
+    return true;
+  default:
+    return false;
+  }
+}
+
 template <typename ELFT>
 bool RelocationPass<ELFT>::requirePLTEntry(const Atom *a) const {
   if (!_hasStaticRelocations.count(a))
@@ -938,7 +967,9 @@ const PLTAtom *RelocationPass<ELFT>::getPLTRegEntry(const Atom *a) {
   if (plt != _pltRegMap.end())
     return plt->second;
 
-  auto pa = new (_file._alloc) PLTAAtom(getGOTPLTEntry(a), _file);
+  PLTAAtom *pa = isR6Target()
+                     ? new (_file._alloc) PLTR6Atom(getGOTPLTEntry(a), _file)
+                     : new (_file._alloc) PLTAAtom(getGOTPLTEntry(a), _file);
   _pltRegMap[a] = pa;
   _pltRegVector.push_back(pa);
 
diff --git a/lld/test/elf/Mips/plt-entry-r6.test b/lld/test/elf/Mips/plt-entry-r6.test
new file mode 100644
index 00000000000..bb05531487f
--- /dev/null
+++ b/lld/test/elf/Mips/plt-entry-r6.test
@@ -0,0 +1,109 @@
+# REQUIRES: mips
+
+# Check generation of PLT entries in case of R6 target ABI.
+
+# Build shared library
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t-so.o
+# RUN: lld -flavor gnu -target mipsel -shared -o %t.so %t-so.o
+
+# Build executable
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t-o.o %t.so
+# RUN: llvm-objdump -d %t.exe | FileCheck %s
+
+# CHECK:      Disassembly of section .plt:
+# CHECK-NEXT: .plt:
+# CHECK-NEXT:   400160:   40 00 1c 3c   lui     $gp, 64
+# CHECK-NEXT:   400164:   00 20 99 8f   lw      $25, 8192($gp)
+# CHECK-NEXT:   400168:   00 20 9c 27   addiu   $gp, $gp, 8192
+# CHECK-NEXT:   40016c:   23 c0 1c 03   subu    $24, $24, $gp
+# CHECK-NEXT:   400170:   21 78 e0 03   move    $15, $ra
+# CHECK-NEXT:   400174:   82 c0 18 00   srl     $24, $24, 2
+# CHECK-NEXT:   400178:   09 f8 20 03   jalr    $25
+# CHECK-NEXT:   40017c:   fe ff 18 27   addiu   $24, $24, -2
+# CHECK-NEXT:   400180:   40 00 0f 3c   lui     $15, 64
+# CHECK-NEXT:   400184:   08 20 f9 8d   lw      $25, 8200($15)
+# CHECK-NEXT:   400188:   09 00 20 03   jr      $25
+# CHECK-NEXT:   40018c:   08 20 f8 25   addiu   $24, $15, 8200
+
+# so.o
+---
+FileHeader:
+  Class:   ELFCLASS32
+  Data:    ELFDATA2LSB
+  Type:    ET_REL
+  Machine: EM_MIPS
+  Flags:   [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
+
+Sections:
+  - Name:         .text
+    Type:         SHT_PROGBITS
+    Size:         0x0C
+    AddressAlign: 16
+    Flags:        [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+  Global:
+    - Name:    T1
+      Section: .text
+      Type:    STT_FUNC
+      Value:   0x0
+      Size:    4
+
+# o.o
+---
+FileHeader:
+  Class:   ELFCLASS32
+  Data:    ELFDATA2LSB
+  Type:    ET_REL
+  Machine: EM_MIPS
+  Flags:   [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
+
+Sections:
+- Name:         .text
+  Type:         SHT_PROGBITS
+  Content:      "0000000C00000000"
+  AddressAlign: 16
+  Flags:        [SHF_EXECINSTR, SHF_ALLOC]
+
+- Name:         .data
+  Type:         SHT_PROGBITS
+  Size:         0x08
+  AddressAlign: 16
+  Flags:        [SHF_WRITE, SHF_ALLOC]
+
+- Name:         .rel.text
+  Type:         SHT_REL
+  Info:         .text
+  AddressAlign: 4
+  Relocations:
+    - Offset: 0x0
+      Symbol: T1
+      Type:   R_MIPS_26
+
+- Name:         .rel.data
+  Type:         SHT_REL
+  Info:         .data
+  AddressAlign: 4
+  Relocations:
+    - Offset: 0x00
+      Symbol: T1
+      Type:   R_MIPS_HI16
+    - Offset: 0x00
+      Symbol: T1
+      Type:   R_MIPS_LO16
+
+Symbols:
+  Global:
+    - Name:    T0
+      Section: .text
+      Type:    STT_FUNC
+      Value:   0x0
+      Size:    0x8
+    - Name:    D0
+      Section: .data
+      Type:    STT_OBJECT
+      Value:   0x0
+      Size:    8
+    - Name:    T1
+...