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| author | Rui Ueyama <ruiu@google.com> | 2017-06-26 19:45:53 +0000 |
|---|---|---|
| committer | Rui Ueyama <ruiu@google.com> | 2017-06-26 19:45:53 +0000 |
| commit | 921d43fbb2db882e4cdf9dd10677b1ec069024f5 (patch) | |
| tree | 5bdae0b31e90cc7803571d8470dc120635196d47 /lld/ELF/Arch/X86.cpp | |
| parent | a21c8e14b609644f5a26416c0e585b4bae66a075 (diff) | |
| download | bcm5719-llvm-921d43fbb2db882e4cdf9dd10677b1ec069024f5.tar.gz bcm5719-llvm-921d43fbb2db882e4cdf9dd10677b1ec069024f5.zip | |
Add trap instructions for ARM and MIPS.
This patch fills holes in executable sections with 0xd4 (ARM) or
0xef (MIPS). These trap instructions were suggested by Theo de Raadt.
llvm-svn: 306322
Diffstat (limited to 'lld/ELF/Arch/X86.cpp')
| -rw-r--r-- | lld/ELF/Arch/X86.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lld/ELF/Arch/X86.cpp b/lld/ELF/Arch/X86.cpp index f605a8583ba..a1e9bcaf1b1 100644 --- a/lld/ELF/Arch/X86.cpp +++ b/lld/ELF/Arch/X86.cpp @@ -60,9 +60,7 @@ X86::X86() { PltEntrySize = 16; PltHeaderSize = 16; TlsGdRelaxSkip = 2; - - // 0xCC is the "int3" (call debug exception handler) instruction. - TrapInstr = 0xcccccccc; + TrapInstr = 0xcccccccc; // 0xcc = INT3 } RelExpr X86::getRelExpr(uint32_t Type, const SymbolBody &S, |
