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| author | John Baldwin <jhb@FreeBSD.org> | 2018-02-27 21:24:02 +0000 |
|---|---|---|
| committer | John Baldwin <jhb@FreeBSD.org> | 2018-02-27 21:24:02 +0000 |
| commit | 0594aee52fad70d2a0b44b321579b857b8cf9244 (patch) | |
| tree | 6f14b96634dacd317fc854d49c16e19c8ce7a905 /libunwind/include/__libunwind_config.h | |
| parent | 5337efc69cdd59950faf0579043eb7aa8b9a3f2e (diff) | |
| download | bcm5719-llvm-0594aee52fad70d2a0b44b321579b857b8cf9244.tar.gz bcm5719-llvm-0594aee52fad70d2a0b44b321579b857b8cf9244.zip | |
[libunwind][MIPS]: Add support for unwinding in N32 processes.
Summary:
N32 uses the same register context as N64. However, N32 requires one
change to properly fetch addresses from registers stored in memory.
Since N32 is an ILP32 platform, getP() only fetches the first 32-bits
of a stored register. For a big-endian platform this fetches the
upper 32-bits which will be zero. To fix this, add a new
getRegister() method to AddressSpace which is responsible for
extracting the address stored in a register in memory. This matches
getP() for all current ABIs except for N32 where it reads the 64-bit
register and returns the low 32-bits as an address. The
DwarfInstructions::getSavedRegister() method uses
AddressSpace::getRegister() instead of AddressSpace::getP().
Reviewers: sdardis, compnerd
Reviewed By: sdardis
Differential Revision: https://reviews.llvm.org/D39074
llvm-svn: 326250
Diffstat (limited to 'libunwind/include/__libunwind_config.h')
| -rw-r--r-- | libunwind/include/__libunwind_config.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/libunwind/include/__libunwind_config.h b/libunwind/include/__libunwind_config.h index 6ae0166b77e..1b75fa9e99e 100644 --- a/libunwind/include/__libunwind_config.h +++ b/libunwind/include/__libunwind_config.h @@ -71,11 +71,15 @@ # define _LIBUNWIND_CURSOR_SIZE 24 # define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K # elif defined(__mips__) -# if defined(_ABIO32) && defined(__mips_soft_float) +# if defined(_ABIO32) && _MIPS_SIM == _ABIO32 && defined(__mips_soft_float) # define _LIBUNWIND_TARGET_MIPS_O32 1 # define _LIBUNWIND_CONTEXT_SIZE 18 # define _LIBUNWIND_CURSOR_SIZE 24 -# elif defined(_ABI64) && defined(__mips_soft_float) +# elif defined(_ABIN32) && _MIPS_SIM == _ABIN32 && defined(__mips_soft_float) +# define _LIBUNWIND_TARGET_MIPS_NEWABI 1 +# define _LIBUNWIND_CONTEXT_SIZE 35 +# define _LIBUNWIND_CURSOR_SIZE 42 +# elif defined(_ABI64) && _MIPS_SIM == _ABI64 && defined(__mips_soft_float) # define _LIBUNWIND_TARGET_MIPS_NEWABI 1 # define _LIBUNWIND_CONTEXT_SIZE 35 # define _LIBUNWIND_CURSOR_SIZE 47 |
