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| author | Craig Topper <craig.topper@intel.com> | 2018-03-22 04:23:41 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-22 04:23:41 +0000 |
| commit | fc179c6dd59b0da8068ecb800095e79d2ec41bc6 (patch) | |
| tree | b6fdac2c21d56ed92e0d211dbad1554a3b0282fa /libcxx/include/experimental | |
| parent | 523de05a1faafe9846608b796b5d7d5b51f4e6cf (diff) | |
| download | bcm5719-llvm-fc179c6dd59b0da8068ecb800095e79d2ec41bc6.tar.gz bcm5719-llvm-fc179c6dd59b0da8068ecb800095e79d2ec41bc6.zip | |
[X86][Skylake] Merge multiple InstrRW entries that map to the same SchedWriteRes group (NFCI) (PR35955)
I've also merged some VEX/non-VEX instregex strings with a (V?) prefix or (Y?) ymm variant - there are still a lot more of these to do.
This reduces the size of the optimized llc binary on my computer by 400K. Presumably because we went from 5000+ scheduler classes per CPU to ~2000.
llvm-svn: 328179
Diffstat (limited to 'libcxx/include/experimental')
0 files changed, 0 insertions, 0 deletions
