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| author | Aaron Watry <awatry@gmail.com> | 2014-08-20 13:58:57 +0000 |
|---|---|---|
| committer | Aaron Watry <awatry@gmail.com> | 2014-08-20 13:58:57 +0000 |
| commit | f991505d02dae4c2e9cd9ae02372a3116da2a14b (patch) | |
| tree | 99138f8a26c76632c9db66bf8622e97c38a6ddda /libclc/generic/lib/shared/vstore_impl.ll | |
| parent | 474972585a1f4328c9f3138c88365a43c11556c0 (diff) | |
| download | bcm5719-llvm-f991505d02dae4c2e9cd9ae02372a3116da2a14b.tar.gz bcm5719-llvm-f991505d02dae4c2e9cd9ae02372a3116da2a14b.zip | |
vload/vstore: Use casts instead of scalarizing everything in CLC version
This generates bitcode which is indistinguishable from what was
hand-written for int32 types in v[load|store]_impl.ll.
v4: Use vec2+scalar for vec3 load/stores to prevent corruption (per Tom)
v3: Also remove unused generic/lib/shared/v[load|store]_impl.ll
v2: (Per Matt Arsenault) Fix alignment issues with vector load stores
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
CC: Matt Arsenault <Matthew.Arsenault@amd.com>
CC: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 216069
Diffstat (limited to 'libclc/generic/lib/shared/vstore_impl.ll')
| -rw-r--r-- | libclc/generic/lib/shared/vstore_impl.ll | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/libclc/generic/lib/shared/vstore_impl.ll b/libclc/generic/lib/shared/vstore_impl.ll deleted file mode 100644 index 9e2a37b2970..00000000000 --- a/libclc/generic/lib/shared/vstore_impl.ll +++ /dev/null @@ -1,40 +0,0 @@ -; This provides optimized implementations of vstore2/3/4/8/16 for 32-bit int/uint -; The address spaces get mapped to data types in target-specific usages - -define void @__clc_vstore2_i32__addr1(<2 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline { - %1 = bitcast i32 addrspace(1)* %addr to <2 x i32> addrspace(1)* - store <2 x i32> %vec, <2 x i32> addrspace(1)* %1, align 4, !tbaa !3 - ret void -} - -define void @__clc_vstore3_i32__addr1(<3 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline { - %1 = bitcast i32 addrspace(1)* %addr to <3 x i32> addrspace(1)* - store <3 x i32> %vec, <3 x i32> addrspace(1)* %1, align 4, !tbaa !3 - ret void -} - -define void @__clc_vstore4_i32__addr1(<4 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline { - %1 = bitcast i32 addrspace(1)* %addr to <4 x i32> addrspace(1)* - store <4 x i32> %vec, <4 x i32> addrspace(1)* %1, align 4, !tbaa !3 - ret void -} - -define void @__clc_vstore8_i32__addr1(<8 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline { - %1 = bitcast i32 addrspace(1)* %addr to <8 x i32> addrspace(1)* - store <8 x i32> %vec, <8 x i32> addrspace(1)* %1, align 4, !tbaa !3 - ret void -} - -define void @__clc_vstore16_i32__addr1(<16 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline { - %1 = bitcast i32 addrspace(1)* %addr to <16 x i32> addrspace(1)* - store <16 x i32> %vec, <16 x i32> addrspace(1)* %1, align 4, !tbaa !3 - ret void -} - -!1 = metadata !{metadata !"char", metadata !5} -!2 = metadata !{metadata !"short", metadata !5} -!3 = metadata !{metadata !"int", metadata !5} -!4 = metadata !{metadata !"long", metadata !5} -!5 = metadata !{metadata !"omnipotent char", metadata !6} -!6 = metadata !{metadata !"Simple C/C++ TBAA"} - |
