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authorKumar Sukhani <kumarsukhani@gmail.com>2014-12-15 10:52:06 +0000
committerKumar Sukhani <kumarsukhani@gmail.com>2014-12-15 10:52:06 +0000
commitfef606cf0aaa7cd6e1cfb3ab12dac26f95de284d (patch)
tree26bddeec72fa1fbccff1564c6035352627f0af29 /compiler-rt
parent72860c341e264c50063407fb7c5912f602cc6c3e (diff)
downloadbcm5719-llvm-fef606cf0aaa7cd6e1cfb3ab12dac26f95de284d.tar.gz
bcm5719-llvm-fef606cf0aaa7cd6e1cfb3ab12dac26f95de284d.zip
[UBSan][MIPS] Adding support of MIPS64 in UBSan testing
On mips64 addresses are 40-bit. Where as a 48 bit address is used in TypeCheck/misaligned.cpp. Using regular expression for that address. reviewed by : samsonov submitted by: sagar llvm-svn: 224242
Diffstat (limited to 'compiler-rt')
-rw-r--r--compiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/compiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp b/compiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp
index 96c375bed72..34b9f0255b1 100644
--- a/compiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp
+++ b/compiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp
@@ -97,8 +97,8 @@ int main(int, char **argv) {
}
case 'w':
- // CHECK-WILD: misaligned.cpp:[[@LINE+3]]:35: runtime error: member access within misaligned address 0x000000000123 for type 'S', which requires 4 byte alignment
- // CHECK-WILD-NEXT: 0x000000000123: note: pointer points here
+ // CHECK-WILD: misaligned.cpp:[[@LINE+3]]:35: runtime error: member access within misaligned address 0x{{0+}}123 for type 'S', which requires 4 byte alignment
+ // CHECK-WILD-NEXT: 0x{{0+}}123: note: pointer points here
// CHECK-WILD-NEXT: <memory cannot be printed>
return static_cast<S*>(wild)->k;
}
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