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| author | Bob Wilson <bob.wilson@apple.com> | 2011-08-23 16:40:18 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2011-08-23 16:40:18 +0000 |
| commit | 7184d9fc3397db1e586cec8b85c42f02dc2bdea0 (patch) | |
| tree | 25cc9baabfa8f2c0c47be0b4b1d0a819268091ba /compiler-rt | |
| parent | db3485cd06e76b771b1103f871cbd028a1957348 (diff) | |
| download | bcm5719-llvm-7184d9fc3397db1e586cec8b85c42f02dc2bdea0.tar.gz bcm5719-llvm-7184d9fc3397db1e586cec8b85c42f02dc2bdea0.zip | |
Change ARM vfp assembly functions to use unified syntax.
llvm-svn: 138332
Diffstat (limited to 'compiler-rt')
34 files changed, 152 insertions, 118 deletions
diff --git a/compiler-rt/lib/arm/adddf3vfp.S b/compiler-rt/lib/arm/adddf3vfp.S index cced1e09a3e..c90b0c2eabe 100644 --- a/compiler-rt/lib/arm/adddf3vfp.S +++ b/compiler-rt/lib/arm/adddf3vfp.S @@ -15,10 +15,11 @@ // Adds two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__adddf3vfp) - fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 - fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 - faddd d6, d6, d7 - fmrrd r0, r1, d6 // move result back to r0/r1 pair + vmov d6, r0, r1 // move first param from r0/r1 pair into d6 + vmov d7, r2, r3 // move second param from r2/r3 pair into d7 + vadd.f64 d6, d6, d7 + vmov r0, r1, d6 // move result back to r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/addsf3vfp.S b/compiler-rt/lib/arm/addsf3vfp.S index b747528de52..43653d5265c 100644 --- a/compiler-rt/lib/arm/addsf3vfp.S +++ b/compiler-rt/lib/arm/addsf3vfp.S @@ -15,10 +15,11 @@ // Adds two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed in GPRs // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__addsf3vfp) - fmsr s14, r0 // move first param from r0 into float register - fmsr s15, r1 // move second param from r1 into float register - fadds s14, s14, s15 - fmrs r0, s14 // move result back to r0 + vmov s14, r0 // move first param from r0 into float register + vmov s15, r1 // move second param from r1 into float register + vadd.f32 s14, s14, s15 + vmov r0, s14 // move result back to r0 bx lr diff --git a/compiler-rt/lib/arm/divdf3vfp.S b/compiler-rt/lib/arm/divdf3vfp.S index 74ef0eabff7..52de67f7fdc 100644 --- a/compiler-rt/lib/arm/divdf3vfp.S +++ b/compiler-rt/lib/arm/divdf3vfp.S @@ -15,10 +15,11 @@ // Divides two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__divdf3vfp) - fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 - fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 - fdivd d5, d6, d7 - fmrrd r0, r1, d5 // move result back to r0/r1 pair + vmov d6, r0, r1 // move first param from r0/r1 pair into d6 + vmov d7, r2, r3 // move second param from r2/r3 pair into d7 + vdiv.f64 d5, d6, d7 + vmov r0, r1, d5 // move result back to r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/divsf3vfp.S b/compiler-rt/lib/arm/divsf3vfp.S index 9eefcf31eba..81ba9030789 100644 --- a/compiler-rt/lib/arm/divsf3vfp.S +++ b/compiler-rt/lib/arm/divsf3vfp.S @@ -15,10 +15,11 @@ // Divides two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed like 32-bit ints. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__divsf3vfp) - fmsr s14, r0 // move first param from r0 into float register - fmsr s15, r1 // move second param from r1 into float register - fdivs s13, s14, s15 - fmrs r0, s13 // move result back to r0 + vmov s14, r0 // move first param from r0 into float register + vmov s15, r1 // move second param from r1 into float register + vdiv.f32 s13, s14, s15 + vmov r0, s13 // move result back to r0 bx lr diff --git a/compiler-rt/lib/arm/eqdf2vfp.S b/compiler-rt/lib/arm/eqdf2vfp.S index 2998a76e021..c41e55a3468 100644 --- a/compiler-rt/lib/arm/eqdf2vfp.S +++ b/compiler-rt/lib/arm/eqdf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr moveq r0, #1 // set result register to 1 if equal movne r0, #0 bx lr diff --git a/compiler-rt/lib/arm/eqsf2vfp.S b/compiler-rt/lib/arm/eqsf2vfp.S index 927566edd7a..730ef88da68 100644 --- a/compiler-rt/lib/arm/eqsf2vfp.S +++ b/compiler-rt/lib/arm/eqsf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr moveq r0, #1 // set result register to 1 if equal movne r0, #0 bx lr diff --git a/compiler-rt/lib/arm/extendsfdf2vfp.S b/compiler-rt/lib/arm/extendsfdf2vfp.S index b1aa88e2ae9..17a146e0280 100644 --- a/compiler-rt/lib/arm/extendsfdf2vfp.S +++ b/compiler-rt/lib/arm/extendsfdf2vfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR and a double precision result is returned in R0/R1 pair. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp) - fmsr s15, r0 // load float register from R0 - fcvtds d7, s15 // convert single to double - fmrrd r0, r1, d7 // return result in r0/r1 pair + vmov s15, r0 // load float register from R0 + vcvt.f64.f32 d7, s15 // convert single to double + vmov r0, r1, d7 // return result in r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/fixdfsivfp.S b/compiler-rt/lib/arm/fixdfsivfp.S index 0285a17e418..b7c3299d1c4 100644 --- a/compiler-rt/lib/arm/fixdfsivfp.S +++ b/compiler-rt/lib/arm/fixdfsivfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp) - fmdrr d7, r0, r1 // load double register from R0/R1 - ftosizd s15, d7 // convert double to 32-bit int into s15 - fmrs r0, s15 // move s15 to result register + vmov d7, r0, r1 // load double register from R0/R1 + vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/fixsfsivfp.S b/compiler-rt/lib/arm/fixsfsivfp.S index d05ba740aff..1cea6a486d6 100644 --- a/compiler-rt/lib/arm/fixsfsivfp.S +++ b/compiler-rt/lib/arm/fixsfsivfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__fixsfsivfp) - fmsr s15, r0 // load float register from R0 - ftosizs s15, s15 // convert single to 32-bit int into s15 - fmrs r0, s15 // move s15 to result register + vmov s15, r0 // load float register from R0 + vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/fixunsdfsivfp.S b/compiler-rt/lib/arm/fixunsdfsivfp.S index ddb703cdd60..54b03592b45 100644 --- a/compiler-rt/lib/arm/fixunsdfsivfp.S +++ b/compiler-rt/lib/arm/fixunsdfsivfp.S @@ -17,9 +17,10 @@ // Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp) - fmdrr d7, r0, r1 // load double register from R0/R1 - ftouizd s15, d7 // convert double to 32-bit int into s15 - fmrs r0, s15 // move s15 to result register + vmov d7, r0, r1 // load double register from R0/R1 + vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/fixunssfsivfp.S b/compiler-rt/lib/arm/fixunssfsivfp.S index afbb64f395e..12adb529ae7 100644 --- a/compiler-rt/lib/arm/fixunssfsivfp.S +++ b/compiler-rt/lib/arm/fixunssfsivfp.S @@ -17,9 +17,10 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp) - fmsr s15, r0 // load float register from R0 - ftouizs s15, s15 // convert single to 32-bit unsigned into s15 - fmrs r0, s15 // move s15 to result register + vmov s15, r0 // load float register from R0 + vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/floatsidfvfp.S b/compiler-rt/lib/arm/floatsidfvfp.S index fe3366a904d..e6a1eb3e497 100644 --- a/compiler-rt/lib/arm/floatsidfvfp.S +++ b/compiler-rt/lib/arm/floatsidfvfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a double precision result is // return in GPR register pair. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp) - fmsr s15, r0 // move int to float register s15 - fsitod d7, s15 // convert 32-bit int in s15 to double in d7 - fmrrd r0, r1, d7 // move d7 to result register pair r0/r1 + vmov s15, r0 // move int to float register s15 + vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7 + vmov r0, r1, d7 // move d7 to result register pair r0/r1 bx lr diff --git a/compiler-rt/lib/arm/floatsisfvfp.S b/compiler-rt/lib/arm/floatsisfvfp.S index 5b416100a49..0d3a24fc1ec 100644 --- a/compiler-rt/lib/arm/floatsisfvfp.S +++ b/compiler-rt/lib/arm/floatsisfvfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a single precision result is // return in a GPR.. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__floatsisfvfp) - fmsr s15, r0 // move int to float register s15 - fsitos s15, s15 // convert 32-bit int in s15 to float in s15 - fmrs r0, s15 // move s15 to result register + vmov s15, r0 // move int to float register s15 + vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/floatunssidfvfp.S b/compiler-rt/lib/arm/floatunssidfvfp.S index 9b22a6f760d..770b20292fd 100644 --- a/compiler-rt/lib/arm/floatunssidfvfp.S +++ b/compiler-rt/lib/arm/floatunssidfvfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a double precision result is // return in GPR register pair. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp) - fmsr s15, r0 // move int to float register s15 - fuitod d7, s15 // convert 32-bit int in s15 to double in d7 - fmrrd r0, r1, d7 // move d7 to result register pair r0/r1 + vmov s15, r0 // move int to float register s15 + vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7 + vmov r0, r1, d7 // move d7 to result register pair r0/r1 bx lr diff --git a/compiler-rt/lib/arm/floatunssisfvfp.S b/compiler-rt/lib/arm/floatunssisfvfp.S index 44d5e938054..16b3ffb104b 100644 --- a/compiler-rt/lib/arm/floatunssisfvfp.S +++ b/compiler-rt/lib/arm/floatunssisfvfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a single precision result is // return in a GPR.. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__floatunssisfvfp) - fmsr s15, r0 // move int to float register s15 - fuitos s15, s15 // convert 32-bit int in s15 to float in s15 - fmrs r0, s15 // move s15 to result register + vmov s15, r0 // move int to float register s15 + vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15 + vmov r0, s15 // move s15 to result register bx lr diff --git a/compiler-rt/lib/arm/gedf2vfp.S b/compiler-rt/lib/arm/gedf2vfp.S index 9993f52fb49..55603b83e30 100644 --- a/compiler-rt/lib/arm/gedf2vfp.S +++ b/compiler-rt/lib/arm/gedf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__gedf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movge r0, #1 // set result register to 1 if greater than or equal movlt r0, #0 bx lr diff --git a/compiler-rt/lib/arm/gesf2vfp.S b/compiler-rt/lib/arm/gesf2vfp.S index 9ce168259bb..02da35c02e9 100644 --- a/compiler-rt/lib/arm/gesf2vfp.S +++ b/compiler-rt/lib/arm/gesf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__gesf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movge r0, #1 // set result register to 1 if greater than or equal movlt r0, #0 bx lr diff --git a/compiler-rt/lib/arm/gtdf2vfp.S b/compiler-rt/lib/arm/gtdf2vfp.S index 8a049c8896f..b5b1e148276 100644 --- a/compiler-rt/lib/arm/gtdf2vfp.S +++ b/compiler-rt/lib/arm/gtdf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movgt r0, #1 // set result register to 1 if equal movle r0, #0 bx lr diff --git a/compiler-rt/lib/arm/gtsf2vfp.S b/compiler-rt/lib/arm/gtsf2vfp.S index 1ffe1ec52ac..685a9cec96c 100644 --- a/compiler-rt/lib/arm/gtsf2vfp.S +++ b/compiler-rt/lib/arm/gtsf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movgt r0, #1 // set result register to 1 if equal movle r0, #0 bx lr diff --git a/compiler-rt/lib/arm/ledf2vfp.S b/compiler-rt/lib/arm/ledf2vfp.S index a04d0f2a4ad..6e140dde876 100644 --- a/compiler-rt/lib/arm/ledf2vfp.S +++ b/compiler-rt/lib/arm/ledf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__ledf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr diff --git a/compiler-rt/lib/arm/lesf2vfp.S b/compiler-rt/lib/arm/lesf2vfp.S index 301120047a7..7b2825097a8 100644 --- a/compiler-rt/lib/arm/lesf2vfp.S +++ b/compiler-rt/lib/arm/lesf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr diff --git a/compiler-rt/lib/arm/ltdf2vfp.S b/compiler-rt/lib/arm/ltdf2vfp.S index 87144a8c815..a09e67a2f43 100644 --- a/compiler-rt/lib/arm/ltdf2vfp.S +++ b/compiler-rt/lib/arm/ltdf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movmi r0, #1 // set result register to 1 if equal movpl r0, #0 bx lr diff --git a/compiler-rt/lib/arm/ltsf2vfp.S b/compiler-rt/lib/arm/ltsf2vfp.S index ca06ae20898..8c7f9a863f3 100644 --- a/compiler-rt/lib/arm/ltsf2vfp.S +++ b/compiler-rt/lib/arm/ltsf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movmi r0, #1 // set result register to 1 if equal movpl r0, #0 bx lr diff --git a/compiler-rt/lib/arm/muldf3vfp.S b/compiler-rt/lib/arm/muldf3vfp.S index 96bba06c118..838581eb109 100644 --- a/compiler-rt/lib/arm/muldf3vfp.S +++ b/compiler-rt/lib/arm/muldf3vfp.S @@ -15,10 +15,11 @@ // Multiplies two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__muldf3vfp) - fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 - fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 - fmuld d6, d6, d7 - fmrrd r0, r1, d6 // move result back to r0/r1 pair + vmov d6, r0, r1 // move first param from r0/r1 pair into d6 + vmov d7, r2, r3 // move second param from r2/r3 pair into d7 + vmul.f64 d6, d6, d7 + vmov r0, r1, d6 // move result back to r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/mulsf3vfp.S b/compiler-rt/lib/arm/mulsf3vfp.S index c56991d62e7..ea25913cc49 100644 --- a/compiler-rt/lib/arm/mulsf3vfp.S +++ b/compiler-rt/lib/arm/mulsf3vfp.S @@ -15,10 +15,11 @@ // Multiplies two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed like 32-bit ints. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__mulsf3vfp) - fmsr s14, r0 // move first param from r0 into float register - fmsr s15, r1 // move second param from r1 into float register - fmuls s13, s14, s15 - fmrs r0, s13 // move result back to r0 + vmov s14, r0 // move first param from r0 into float register + vmov s15, r1 // move second param from r1 into float register + vmul.f32 s13, s14, s15 + vmov r0, s13 // move result back to r0 bx lr diff --git a/compiler-rt/lib/arm/nedf2vfp.S b/compiler-rt/lib/arm/nedf2vfp.S index a02b09cc807..21670816c60 100644 --- a/compiler-rt/lib/arm/nedf2vfp.S +++ b/compiler-rt/lib/arm/nedf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__nedf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movne r0, #1 // set result register to 0 if unequal moveq r0, #0 bx lr diff --git a/compiler-rt/lib/arm/negdf2vfp.S b/compiler-rt/lib/arm/negdf2vfp.S index 100f4fd5c82..64c9b692f45 100644 --- a/compiler-rt/lib/arm/negdf2vfp.S +++ b/compiler-rt/lib/arm/negdf2vfp.S @@ -15,6 +15,7 @@ // Returns the negation a double precision floating point numbers using the // Darwin calling convention where double arguments are passsed in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__negdf2vfp) eor r1, r1, #-2147483648 // flip sign bit on double in r0/r1 pair diff --git a/compiler-rt/lib/arm/negsf2vfp.S b/compiler-rt/lib/arm/negsf2vfp.S index f96c8ad2b56..b883b733df6 100644 --- a/compiler-rt/lib/arm/negsf2vfp.S +++ b/compiler-rt/lib/arm/negsf2vfp.S @@ -15,6 +15,7 @@ // Returns the negation of a single precision floating point numbers using the // Darwin calling convention where single arguments are passsed like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__negsf2vfp) eor r0, r0, #-2147483648 // flip sign bit on float in r0 diff --git a/compiler-rt/lib/arm/nesf2vfp.S b/compiler-rt/lib/arm/nesf2vfp.S index d6205497ae6..fa7aa80e191 100644 --- a/compiler-rt/lib/arm/nesf2vfp.S +++ b/compiler-rt/lib/arm/nesf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__nesf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movne r0, #1 // set result register to 1 if unequal moveq r0, #0 bx lr diff --git a/compiler-rt/lib/arm/subdf3vfp.S b/compiler-rt/lib/arm/subdf3vfp.S index ff53b3000d1..3f88baacd5b 100644 --- a/compiler-rt/lib/arm/subdf3vfp.S +++ b/compiler-rt/lib/arm/subdf3vfp.S @@ -15,10 +15,11 @@ // Returns difference between two double precision floating point numbers using // the Darwin calling convention where double arguments are passsed in GPR pairs // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__subdf3vfp) - fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 - fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 - fsubd d6, d6, d7 - fmrrd r0, r1, d6 // move result back to r0/r1 pair + vmov d6, r0, r1 // move first param from r0/r1 pair into d6 + vmov d7, r2, r3 // move second param from r2/r3 pair into d7 + vsub.f64 d6, d6, d7 + vmov r0, r1, d6 // move result back to r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/subsf3vfp.S b/compiler-rt/lib/arm/subsf3vfp.S index 238f3f04745..ed02ba92167 100644 --- a/compiler-rt/lib/arm/subsf3vfp.S +++ b/compiler-rt/lib/arm/subsf3vfp.S @@ -16,10 +16,11 @@ // using the Darwin calling convention where single arguments are passsed // like 32-bit ints. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__subsf3vfp) - fmsr s14, r0 // move first param from r0 into float register - fmsr s15, r1 // move second param from r1 into float register - fsubs s14, s14, s15 - fmrs r0, s14 // move result back to r0 + vmov s14, r0 // move first param from r0 into float register + vmov s15, r1 // move second param from r1 into float register + vsub.f32 s14, s14, s15 + vmov r0, s14 // move result back to r0 bx lr diff --git a/compiler-rt/lib/arm/truncdfsf2vfp.S b/compiler-rt/lib/arm/truncdfsf2vfp.S index 6e55c7ffb52..371aee94b16 100644 --- a/compiler-rt/lib/arm/truncdfsf2vfp.S +++ b/compiler-rt/lib/arm/truncdfsf2vfp.S @@ -16,9 +16,10 @@ // Uses Darwin calling convention where a double precision parameter is // passed in a R0/R1 pair and a signle precision result is returned in R0. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp) - fmdrr d7, r0, r1 // load double from r0/r1 pair - fcvtsd s15, d7 // convert double to single (trucate precision) - fmrs r0, s15 // return result in r0 + vmov d7, r0, r1 // load double from r0/r1 pair + vcvt.f32.f64 s15, d7 // convert double to single (trucate precision) + vmov r0, s15 // return result in r0 bx lr diff --git a/compiler-rt/lib/arm/unorddf2vfp.S b/compiler-rt/lib/arm/unorddf2vfp.S index 9b52131e4bc..c49e55f29a4 100644 --- a/compiler-rt/lib/arm/unorddf2vfp.S +++ b/compiler-rt/lib/arm/unorddf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp) - fmdrr d6, r0, r1 // load r0/r1 pair in double register - fmdrr d7, r2, r3 // load r2/r3 pair in double register - fcmpd d6, d7 - fmstat + vmov d6, r0, r1 // load r0/r1 pair in double register + vmov d7, r2, r3 // load r2/r3 pair in double register + vcmp.f64 d6, d7 + vmrs apsr_nzcv, fpscr movvs r0, #1 // set result register to 1 if "overflow" (any NaNs) movvc r0, #0 bx lr diff --git a/compiler-rt/lib/arm/unordsf2vfp.S b/compiler-rt/lib/arm/unordsf2vfp.S index e486533e2ad..0ab27edf51a 100644 --- a/compiler-rt/lib/arm/unordsf2vfp.S +++ b/compiler-rt/lib/arm/unordsf2vfp.S @@ -16,12 +16,13 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // + .syntax unified .align 2 DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp) - fmsr s14, r0 // move from GPR 0 to float register - fmsr s15, r1 // move from GPR 1 to float register - fcmps s14, s15 - fmstat + vmov s14, r0 // move from GPR 0 to float register + vmov s15, r1 // move from GPR 1 to float register + vcmp.f32 s14, s15 + vmrs apsr_nzcv, fpscr movvs r0, #1 // set result register to 1 if "overflow" (any NaNs) movvc r0, #0 bx lr |
