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| author | Craig Topper <craig.topper@intel.com> | 2017-11-19 00:46:21 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-19 00:46:21 +0000 |
| commit | 436c9263fbe9318a411db883adf9863ba8c01433 (patch) | |
| tree | 40247e40e27b543c163dbc1873e3f233073d1fbc /compiler-rt | |
| parent | b3a66f764162fec1c1d667fc2e7909997ef4db6e (diff) | |
| download | bcm5719-llvm-436c9263fbe9318a411db883adf9863ba8c01433.tar.gz bcm5719-llvm-436c9263fbe9318a411db883adf9863ba8c01433.zip | |
[X86] Add cpu detection for cannonlake.
This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html
llvm-svn: 318610
Diffstat (limited to 'compiler-rt')
| -rw-r--r-- | compiler-rt/lib/builtins/cpu_model.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c index 2fd39e15a7c..4c96e9cd85d 100644 --- a/compiler-rt/lib/builtins/cpu_model.c +++ b/compiler-rt/lib/builtins/cpu_model.c @@ -75,6 +75,7 @@ enum ProcessorSubtypes { INTEL_COREI7_BROADWELL, INTEL_COREI7_SKYLAKE, INTEL_COREI7_SKYLAKE_AVX512, + INTEL_COREI7_CANNONLAKE, CPU_SUBTYPE_MAX }; @@ -340,6 +341,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, *Subtype = INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512" break; + // Cannonlake: + case 0x66: + *Type = INTEL_COREI7; + *Subtype = INTEL_COREI7_CANNONLAKE; // "cannonlake" + break; + case 0x1c: // Most 45 nm Intel Atom processors case 0x26: // 45 nm Atom Lincroft case 0x27: // 32 nm Atom Medfield |
