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| author | Craig Topper <craig.topper@intel.com> | 2018-07-13 04:50:39 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-07-13 04:50:39 +0000 |
| commit | 2ab325ba23833b35ba137257378faf2cde7c13d0 (patch) | |
| tree | 14161abf75fbb1dc8a7e49b9584a3768de784e3c /compiler-rt | |
| parent | 5d92d3e5be7e4a25e20cc77194723da0a2740eb8 (diff) | |
| download | bcm5719-llvm-2ab325ba23833b35ba137257378faf2cde7c13d0.tar.gz bcm5719-llvm-2ab325ba23833b35ba137257378faf2cde7c13d0.zip | |
[X86] Remove isel patterns that turns packed add/sub/mul/div+movss/sd into scalar intrinsic instructions.
This is not an optimization we should be doing in isel. This is more suitable for a DAG combine.
My main concern is a future time when we support more FPENV. Changing a packed op to a scalar op could cause us to miss some exceptions that should have occured if we had done a packed op. A DAG combine would be better able to manage this.
llvm-svn: 336971
Diffstat (limited to 'compiler-rt')
0 files changed, 0 insertions, 0 deletions
