ARM: implement __sync_fetch_and_* operations

Since these are primarily useful for deeply embedded targets where code size is
very important, they are each in a separate file making use of infrastructure
in sync-ops.h. This allows a linker to include just the functions that are
actually used.

rdar://problem/14736665

llvm-svn: 202812

1 files changed, 61 insertions, 0 deletions

diff --git a/compiler-rt/lib/builtins/arm/sync-ops.h b/compiler-rt/lib/builtins/arm/sync-ops.h
new file mode 100644
index 00000000000..0c13394f2c5
--- /dev/null
+++ b/compiler-rt/lib/builtins/arm/sync-ops.h
@@ -0,0 +1,61 @@
+/*===-- sync-ops.h - --===//
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ *===----------------------------------------------------------------------===//
+ *
+ * FIXME: description
+ * This file implements the __udivsi3 (32-bit unsigned integer divide) 
+ * function for the ARM architecture.  A naive digit-by-digit computation is
+ * employed for simplicity.
+ *
+ *===----------------------------------------------------------------------===*/
+
+#include "../assembly.h"
+
+#define SYNC_OP_4(op) \
+        .align 2 ; \
+        .thumb ; \
+        DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_ ## op) \
+        dmb ; \
+        mov r12, r0 ; \
+        LOCAL_LABEL(tryatomic_ ## op): \
+        ldrex r0, [r12] ; \
+        op(r2, r0, r1) ; \
+        strex r3, r2, [r12] ; \
+        cbnz r3, LOCAL_LABEL(tryatomic_ ## op) ; \
+        dmb ; \
+        bx lr
+
+#define SYNC_OP_8(op) \
+        .align 2 ; \
+        .thumb ; \
+        DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_ ## op) \
+        push {r4, r5, r6, lr} ; \
+        dmb ; \
+        mov r12, r0 ; \
+        LOCAL_LABEL(tryatomic_ ## op): \
+        ldrexd r0, r1, [r12] ; \
+        op(r4, r5, r0, r1, r2, r3) ; \
+        strexd r6, r4, r5, [r12] ; \
+        cbnz r6, LOCAL_LABEL(tryatomic_ ## op) ; \
+        dmb ; \
+        pop {r4, r5, r6, pc}
+
+#define MINMAX_4(rD, rN, rM, cmp_kind) \
+        cmp rN, rM ; \
+        mov rD, rM ; \
+        it cmp_kind ; \
+        mov##cmp_kind rD, rN
+
+#define MINMAX_8(rD_LO, rD_HI, rN_LO, rN_HI, rM_LO, rM_HI, cmp_kind) \
+        cmp rN_LO, rM_LO ; \
+        sbcs rN_HI, rM_HI ; \
+        mov rD_LO, rM_LO ; \
+        mov rD_HI, rM_HI ; \
+        itt cmp_kind ; \
+        mov##cmp_kind rD_LO, rN_LO ; \
+        mov##cmp_kind rD_HI, rN_HI