start adding implementation of arm *vfp routines with test cases

llvm-svn: 81558

8 files changed, 185 insertions, 0 deletions

diff --git a/compiler-rt/lib/arm/adddf3vfp.S b/compiler-rt/lib/arm/adddf3vfp.S
new file mode 100644
index 00000000000..f4bb1ce4c39
--- /dev/null
+++ b/compiler-rt/lib/arm/adddf3vfp.S
@@ -0,0 +1,23 @@
+//===-- adddf3vfp.S - Implement adddf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// double __adddf3vfp(double a, double b) { return a + b; }
+//
+// Adds two double precision floating point numbers using the Darwin
+// calling convention where double arguments are passsed in GPR pairs
+//
+		.globl ___adddf3vfp
+___adddf3vfp:
+	fmdrr	d6, r0, r1		// move first param from r0/r1 pair into d6
+	fmdrr	d7, r2, r3		// move second param from r2/r3 pair into d7
+	faddd	d6, d6, d7		
+	fmrrd	r0, r1, d6		// move result back to r0/r1 pair
+	bx	lr
diff --git a/compiler-rt/lib/arm/addsf3vfp.S b/compiler-rt/lib/arm/addsf3vfp.S
new file mode 100644
index 00000000000..81b114f6729
--- /dev/null
+++ b/compiler-rt/lib/arm/addsf3vfp.S
@@ -0,0 +1,23 @@
+//===-- addsf3vfp.S - Implement addsf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern float __addsf3vfp(float a, float b);
+//
+// Adds two single precision floating point numbers using the Darwin
+// calling convention where single arguments are passsed in GPRs
+//
+		.globl ___addsf3vfp
+___addsf3vfp:
+	fmsr	s14, r0		// move first param from r0 into float register
+	fmsr	s15, r1		// move second param from r1 into float register
+	fadds	s14, s14, s15
+	fmrs	r0, s14		// move result back to r0
+	bx	lr
diff --git a/compiler-rt/lib/arm/divdf3vfp.S b/compiler-rt/lib/arm/divdf3vfp.S
new file mode 100644
index 00000000000..59421ef1465
--- /dev/null
+++ b/compiler-rt/lib/arm/divdf3vfp.S
@@ -0,0 +1,23 @@
+//===-- divdf3vfp.S - Implement divdf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern double __divdf3vfp(double a, double b);
+//
+// Divides two double precision floating point numbers using the Darwin
+// calling convention where double arguments are passsed in GPR pairs
+//
+	.globl ___divdf3vfp
+___divdf3vfp:
+	fmdrr	d6, r0, r1		// move first param from r0/r1 pair into d6
+	fmdrr	d7, r2, r3		// move second param from r2/r3 pair into d7
+	fdivd	d5, d6, d7		
+	fmrrd	r0, r1, d5		// move result back to r0/r1 pair
+	bx	lr
diff --git a/compiler-rt/lib/arm/divsf3vfp.S b/compiler-rt/lib/arm/divsf3vfp.S
new file mode 100644
index 00000000000..62c79ea568c
--- /dev/null
+++ b/compiler-rt/lib/arm/divsf3vfp.S
@@ -0,0 +1,23 @@
+//===-- divsf3vfp.S - Implement divsf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern float __divsf3vfp(float a, float b);
+//
+// Divides two single precision floating point numbers using the Darwin
+// calling convention where single arguments are passsed like 32-bit ints.
+//
+	.globl ___divsf3vfp
+___divsf3vfp:
+	fmsr	s14, r0		// move first param from r0 into float register
+	fmsr	s15, r1		// move second param from r1 into float register
+	fdivs	s13, s14, s15
+	fmrs	r0, s13		// move result back to r0
+	bx	lr
diff --git a/compiler-rt/lib/arm/muldf3vfp.S b/compiler-rt/lib/arm/muldf3vfp.S
new file mode 100644
index 00000000000..5292b8e87b4
--- /dev/null
+++ b/compiler-rt/lib/arm/muldf3vfp.S
@@ -0,0 +1,23 @@
+//===-- muldf3vfp.S - Implement muldf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern double __muldf3vfp(double a, double b);
+//
+// Multiplies two double precision floating point numbers using the Darwin
+// calling convention where double arguments are passsed in GPR pairs
+//
+	.globl ___muldf3vfp
+___muldf3vfp:
+	fmdrr	d6, r0, r1		// move first param from r0/r1 pair into d6
+	fmdrr	d7, r2, r3		// move second param from r2/r3 pair into d7
+	fmuld	d6, d6, d7		
+	fmrrd	r0, r1, d6		// move result back to r0/r1 pair
+	bx	lr
diff --git a/compiler-rt/lib/arm/mulsf3vfp.S b/compiler-rt/lib/arm/mulsf3vfp.S
new file mode 100644
index 00000000000..e6cdca3a6fc
--- /dev/null
+++ b/compiler-rt/lib/arm/mulsf3vfp.S
@@ -0,0 +1,23 @@
+//===-- mulsf3vfp.S - Implement mulsf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern float __mulsf3vfp(float a, float b);
+//
+// Multiplies two single precision floating point numbers using the Darwin
+// calling convention where single arguments are passsed like 32-bit ints.
+//
+	.globl ___mulsf3vfp
+___mulsf3vfp:
+	fmsr	s14, r0		// move first param from r0 into float register
+	fmsr	s15, r1		// move second param from r1 into float register
+	fmuls	s13, s14, s15
+	fmrs	r0, s13		// move result back to r0
+	bx	lr
diff --git a/compiler-rt/lib/arm/subdf3vfp.S b/compiler-rt/lib/arm/subdf3vfp.S
new file mode 100644
index 00000000000..c138c3a2ea1
--- /dev/null
+++ b/compiler-rt/lib/arm/subdf3vfp.S
@@ -0,0 +1,23 @@
+//===-- subdf3vfp.S - Implement subdf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern double __subdf3vfp(double a, double b);
+//
+// Returns difference between two double precision floating point numbers using 
+// the Darwin calling convention where double arguments are passsed in GPR pairs
+//
+		.globl ___subdf3vfp
+___subdf3vfp:
+	fmdrr	d6, r0, r1		// move first param from r0/r1 pair into d6
+	fmdrr	d7, r2, r3		// move second param from r2/r3 pair into d7
+	fsubd	d6, d6, d7		
+	fmrrd	r0, r1, d6		// move result back to r0/r1 pair
+	bx	lr
diff --git a/compiler-rt/lib/arm/subsf3vfp.S b/compiler-rt/lib/arm/subsf3vfp.S
new file mode 100644
index 00000000000..493a8508666
--- /dev/null
+++ b/compiler-rt/lib/arm/subsf3vfp.S
@@ -0,0 +1,24 @@
+//===-- subsf3vfp.S - Implement subsf3vfp ---------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern float __subsf3vfp(float a, float b);
+//
+// Returns the difference between two single precision floating point numbers 
+// using the Darwin calling convention where single arguments are passsed
+// like 32-bit ints.
+//
+		.globl ___subsf3vfp
+___subsf3vfp:
+	fmsr	s14, r0		// move first param from r0 into float register
+	fmsr	s15, r1		// move second param from r1 into float register
+	fsubs	s14, s14, s15
+	fmrs	r0, s14		// move result back to r0
+	bx	lr