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| author | Simon Atanasyan <simon@atanasyan.com> | 2015-01-15 07:04:48 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2015-01-15 07:04:48 +0000 |
| commit | e6694eb2457aaf0e3440864d2bacf49b7de88295 (patch) | |
| tree | 8753b6e27877e2d6cf74f1f65560b5e2e1d3e70b /clang | |
| parent | 8e1a913cfacad6de89eaa3cdd95d19fbe1743ac6 (diff) | |
| download | bcm5719-llvm-e6694eb2457aaf0e3440864d2bacf49b7de88295.tar.gz bcm5719-llvm-e6694eb2457aaf0e3440864d2bacf49b7de88295.zip | |
[Mips] Define macros `__mips_isa_rev` in case of mips32r6/mips64r6 options
llvm-svn: 226136
Diffstat (limited to 'clang')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 4 | ||||
| -rw-r--r-- | clang/test/Preprocessor/init.c | 18 |
2 files changed, 22 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 4c64a02b5b8..45a37172926 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -5922,6 +5922,8 @@ public: Builder.defineMacro("__mips_isa_rev", "1"); else if (CPUStr == "mips32r2") Builder.defineMacro("__mips_isa_rev", "2"); + else if (CPUStr == "mips32r6") + Builder.defineMacro("__mips_isa_rev", "6"); if (ABI == "o32") { Builder.defineMacro("__mips_o32"); @@ -6065,6 +6067,8 @@ public: Builder.defineMacro("__mips_isa_rev", "1"); else if (CPUStr == "mips64r2") Builder.defineMacro("__mips_isa_rev", "2"); + else if (CPUStr == "mips64r6") + Builder.defineMacro("__mips_isa_rev", "6"); if (ABI == "n32") { Builder.defineMacro("__mips_n32"); diff --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c index 4f321140c6b..f4fa4562bec 100644 --- a/clang/test/Preprocessor/init.c +++ b/clang/test/Preprocessor/init.c @@ -3442,6 +3442,15 @@ // MIPS-ARCH-32R2:#define _MIPS_ISA _MIPS_ISA_MIPS32 // MIPS-ARCH-32R2:#define __mips_isa_rev 2 // +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \ +// RUN: -target-cpu mips32r6 < /dev/null \ +// RUN: | FileCheck -check-prefix MIPS-ARCH-32R6 %s +// +// MIPS-ARCH-32R6:#define _MIPS_ARCH "mips32r6" +// MIPS-ARCH-32R6:#define _MIPS_ARCH_MIPS32R6 1 +// MIPS-ARCH-32R6:#define _MIPS_ISA _MIPS_ISA_MIPS32 +// MIPS-ARCH-32R6:#define __mips_isa_rev 6 +// // RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \ // RUN: < /dev/null \ // RUN: | FileCheck -check-prefix MIPS-ARCH-DEF64 %s @@ -3469,6 +3478,15 @@ // MIPS-ARCH-64R2:#define _MIPS_ISA _MIPS_ISA_MIPS64 // MIPS-ARCH-64R2:#define __mips_isa_rev 2 // +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \ +// RUN: -target-cpu mips64r6 < /dev/null \ +// RUN: | FileCheck -check-prefix MIPS-ARCH-64R6 %s +// +// MIPS-ARCH-64R6:#define _MIPS_ARCH "mips64r6" +// MIPS-ARCH-64R6:#define _MIPS_ARCH_MIPS64R6 1 +// MIPS-ARCH-64R6:#define _MIPS_ISA _MIPS_ISA_MIPS64 +// MIPS-ARCH-64R6:#define __mips_isa_rev 6 +// // Check MIPS float ABI macros // // RUN: %clang_cc1 -E -dM -ffreestanding \ |
