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author | David Majnemer <david.majnemer@gmail.com> | 2015-07-16 03:13:02 +0000 |
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committer | David Majnemer <david.majnemer@gmail.com> | 2015-07-16 03:13:02 +0000 |
commit | 6b8e29708932a08c20794f3ea96099f3dfa89573 (patch) | |
tree | 965365b63c4826e0da605174a6b8837cd05097d2 /clang | |
parent | 05fc0f25d67a815d822ac3139e5c74110280600a (diff) | |
download | bcm5719-llvm-6b8e29708932a08c20794f3ea96099f3dfa89573.tar.gz bcm5719-llvm-6b8e29708932a08c20794f3ea96099f3dfa89573.zip |
[Intrin.h] Use compiler builtins to model memory barriers
_ReadBarrier, _WriteBarrier, and _ReadWriteBarrier are essentially
memory barriers of one form or another. Model these as
atomic_signal_fence(ATOMIC_SEQ_CST).
__faststorefence is a curious intrinsic. It's single purpose seems to
an alternative to mfence when that instruction is slow. However, mfence
is not always slow and is, in general, preferable to a 'lock or'
sequence on certain CPUs. Give the compiler freedom to select the best
sequence to get a fence.
llvm-svn: 242378
Diffstat (limited to 'clang')
-rw-r--r-- | clang/lib/Headers/Intrin.h | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/clang/lib/Headers/Intrin.h b/clang/lib/Headers/Intrin.h index 24b3eae8bf8..67c8a63265f 100644 --- a/clang/lib/Headers/Intrin.h +++ b/clang/lib/Headers/Intrin.h @@ -770,27 +770,25 @@ _InterlockedCompareExchange64(__int64 volatile *_Destination, /*----------------------------------------------------------------------------*\ |* Barriers \*----------------------------------------------------------------------------*/ -#if defined(__i386__) || defined(__x86_64__) static __inline__ void __DEFAULT_FN_ATTRS __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) _ReadWriteBarrier(void) { - __asm__ volatile ("" : : : "memory"); + __atomic_signal_fence(__ATOMIC_SEQ_CST); } static __inline__ void __DEFAULT_FN_ATTRS __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) _ReadBarrier(void) { - __asm__ volatile ("" : : : "memory"); + __atomic_signal_fence(__ATOMIC_SEQ_CST); } static __inline__ void __DEFAULT_FN_ATTRS __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) _WriteBarrier(void) { - __asm__ volatile ("" : : : "memory"); + __atomic_signal_fence(__ATOMIC_SEQ_CST); } -#endif #ifdef __x86_64__ static __inline__ void __DEFAULT_FN_ATTRS __faststorefence(void) { - __asm__ volatile("lock orq $0, (%%rsp)" : : : "memory"); + __atomic_thread_fence(__ATOMIC_SEQ_CST); } #endif /*----------------------------------------------------------------------------*\ |