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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-11-13 11:58:19 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-11-13 12:02:01 +0000 |
| commit | 4d0e7b628a82fb81f833a6221abfa88f82029ea5 (patch) | |
| tree | cf1fc3bf8134070ab654c4cb0a9c6dde4c47ea78 /clang/utils | |
| parent | fd9fa9995cdafa526543df466d762a982863a906 (diff) | |
| download | bcm5719-llvm-4d0e7b628a82fb81f833a6221abfa88f82029ea5.tar.gz bcm5719-llvm-4d0e7b628a82fb81f833a6221abfa88f82029ea5.zip | |
[X86][AVX] Add plausible schedule classes to MASKPAIR/VP2INTERSECT/VDPBF16PS instructions
These are really just placeholders that use approximately the right resources - once we have CPUs scheduler models that support these instructions they will need revisiting.
In the meantime this means that all instructions have a class of some kind., meaning models can be more easily flagged as complete.
Diffstat (limited to 'clang/utils')
0 files changed, 0 insertions, 0 deletions
