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authorSanjay Patel <spatel@rotateright.com>2017-03-06 16:36:42 +0000
committerSanjay Patel <spatel@rotateright.com>2017-03-06 16:36:42 +0000
commit7f7947bf413151d26571719678bcbfab25cc2ab3 (patch)
tree496761091830112dd003d8daf9cd5882661c3e78 /clang/unittests/Format/NamespaceEndCommentsFixerTest.cpp
parentd1eff2f022929a2d8d7ab9f9db4c922381bd03c5 (diff)
downloadbcm5719-llvm-7f7947bf413151d26571719678bcbfab25cc2ab3.tar.gz
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[DAGCombiner] simplify div/rem-by-0
Refactoring of duplicated code and more fixes to follow. This is motivated by the post-commit comments for r296699: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170306/435182.html Ie, we can crash if we're missing obvious simplifications like this that exist in the IR simplifier or if these occur later than expected. The x86 change for non-splat division shows a potential opportunity to improve vector codegen: we assumed that since only one lane had meaningful results, we should do the math in scalar. But that means moving back and forth from vector registers. llvm-svn: 297026
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