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| author | Erich Keane <erich.keane@intel.com> | 2018-11-13 15:48:08 +0000 |
|---|---|---|
| committer | Erich Keane <erich.keane@intel.com> | 2018-11-13 15:48:08 +0000 |
| commit | de6480a38c4e6ab1e7c0c11fc7be87a4742d2d45 (patch) | |
| tree | ddf817a5d47446df36580c6dcbe36c94c3298651 /clang/test | |
| parent | 28e2dbb14d49b8476516a1ba45f5dcda841a8765 (diff) | |
| download | bcm5719-llvm-de6480a38c4e6ab1e7c0c11fc7be87a4742d2d45.tar.gz bcm5719-llvm-de6480a38c4e6ab1e7c0c11fc7be87a4742d2d45.zip | |
[NFC] Move storage of dispatch-version to GlobalDecl
As suggested by Richard Smith, and initially put up for review here:
https://reviews.llvm.org/D53341, this patch removes a hack that was used
to ensure that proper target-feature lists were used when emitting
cpu-dispatch (and eventually, target-clones) implementations. As a part
of this, the GlobalDecl object is proliferated to a bunch more
locations.
Originally, this was put up for review (see above) to get acceptance on
the approach, though discussion with Richard in San Diego showed he
approved of the approach taken here. Thus, I believe this is acceptable
for Review-After-commit
Differential Revision: https://reviews.llvm.org/D53341
Change-Id: I0a0bd673340d334d93feac789d653e03d9f6b1d5
llvm-svn: 346757
Diffstat (limited to 'clang/test')
| -rw-r--r-- | clang/test/CodeGen/attr-cpuspecific.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/clang/test/CodeGen/attr-cpuspecific.c b/clang/test/CodeGen/attr-cpuspecific.c index e1562e52e00..57a0ebebf25 100644 --- a/clang/test/CodeGen/attr-cpuspecific.c +++ b/clang/test/CodeGen/attr-cpuspecific.c @@ -223,6 +223,34 @@ int GenericAndPentium(int i, double d); // WINDOWS-NOT: call i32 @GenericAndPentium.A // WINDOWS-NOT: call void @llvm.trap +ATTR(cpu_dispatch(atom, pentium)) +int DispatchFirst(void); +// LINUX: define i32 ()* @DispatchFirst.resolver +// LINUX: ret i32 ()* @DispatchFirst.O +// LINUX: ret i32 ()* @DispatchFirst.B + +// WINDOWS: define dso_local i32 @DispatchFirst() +// WINDOWS: %[[RET:.+]] = musttail call i32 @DispatchFirst.O() +// WINDOWS-NEXT: ret i32 %[[RET]] +// WINDOWS: %[[RET:.+]] = musttail call i32 @DispatchFirst.B() +// WINDOWS-NEXT: ret i32 %[[RET]] + +ATTR(cpu_specific(atom)) +int DispatchFirst(void) {return 0;} +// LINUX: define i32 @DispatchFirst.O +// LINUX: ret i32 0 + +// WINDOWS: define dso_local i32 @DispatchFirst.O() +// WINDOWS: ret i32 0 + +ATTR(cpu_specific(pentium)) +int DispatchFirst(void) {return 1;} +// LINUX: define i32 @DispatchFirst.B +// LINUX: ret i32 1 + +// WINDOWS: define dso_local i32 @DispatchFirst.B +// WINDOWS: ret i32 1 + // CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+f16c,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" // CHECK: attributes #[[K]] = {{.*}}"target-features"="+adx,+avx,+avx2,+avx512cd,+avx512er,+avx512f,+avx512pf,+bmi,+cmov,+f16c,+fma,+lzcnt,+mmx,+movbe,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" // CHECK: attributes #[[O]] = {{.*}}"target-features"="+cmov,+mmx,+movbe,+sse,+sse2,+sse3,+ssse3,+x87" |
