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authorCraig Topper <craig.topper@intel.com>2018-08-28 06:28:25 +0000
committerCraig Topper <craig.topper@intel.com>2018-08-28 06:28:25 +0000
commitcb5fd56c7f29e3785e851fd7cbc8c361a7fd5368 (patch)
tree6e8183f2bd8fada32d9201afa03aa97e853890a4 /clang/test
parentc7506b28c11b4a382bd499c21ef5e6aac8c3c29f (diff)
downloadbcm5719-llvm-cb5fd56c7f29e3785e851fd7cbc8c361a7fd5368.tar.gz
bcm5719-llvm-cb5fd56c7f29e3785e851fd7cbc8c361a7fd5368.zip
[X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic names for 16 bit masks.
This matches gcc and icc despite not being documented in the Intel Intrinsics Guide. llvm-svn: 340798
Diffstat (limited to 'clang/test')
-rw-r--r--clang/test/CodeGen/avx512bw-builtins.c92
-rw-r--r--clang/test/CodeGen/avx512dq-builtins.c46
-rw-r--r--clang/test/CodeGen/avx512f-builtins.c46
3 files changed, 184 insertions, 0 deletions
diff --git a/clang/test/CodeGen/avx512bw-builtins.c b/clang/test/CodeGen/avx512bw-builtins.c
index 7a3a7d09e52..808b1c06f92 100644
--- a/clang/test/CodeGen/avx512bw-builtins.c
+++ b/clang/test/CodeGen/avx512bw-builtins.c
@@ -134,6 +134,98 @@ __mmask64 test_kxor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _
__E, __F);
}
+unsigned char test_kortestz_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestz_mask32_u8
+ // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <32 x i1> [[OR]] to i32
+ // CHECK: [[CMP:%.*]] = icmp eq i32 [[CAST]], 0
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestz_mask32_u8(_mm512_cmpneq_epu16_mask(__A, __B),
+ _mm512_cmpneq_epu16_mask(__C, __D));
+}
+
+unsigned char test_kortestc_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestc_mask32_u8
+ // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <32 x i1> [[OR]] to i32
+ // CHECK: [[CMP:%.*]] = icmp eq i32 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestc_mask32_u8(_mm512_cmpneq_epu16_mask(__A, __B),
+ _mm512_cmpneq_epu16_mask(__C, __D));
+}
+
+unsigned char test_kortest_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) {
+ // CHECK-LABEL: @test_kortest_mask32_u8
+ // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <32 x i1> [[OR]] to i32
+ // CHECK: [[CMP:%.*]] = icmp eq i32 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ // CHECK: [[LHS2:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[RHS2:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+ // CHECK: [[OR2:%.*]] = or <32 x i1> [[LHS2]], [[RHS2]]
+ // CHECK: [[CAST2:%.*]] = bitcast <32 x i1> [[OR2]] to i32
+ // CHECK: [[CMP2:%.*]] = icmp eq i32 [[CAST2]], 0
+ // CHECK: [[ZEXT2:%.*]] = zext i1 [[CMP2]] to i32
+ // CHECK: trunc i32 [[ZEXT2]] to i8
+ return _kortest_mask32_u8(_mm512_cmpneq_epu16_mask(__A, __B),
+ _mm512_cmpneq_epu16_mask(__C, __D), CF);
+}
+
+unsigned char test_kortestz_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestz_mask64_u8
+ // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <64 x i1> [[OR]] to i64
+ // CHECK: [[CMP:%.*]] = icmp eq i64 [[CAST]], 0
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestz_mask64_u8(_mm512_cmpneq_epu8_mask(__A, __B),
+ _mm512_cmpneq_epu8_mask(__C, __D));
+}
+
+unsigned char test_kortestc_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestc_mask64_u8
+ // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <64 x i1> [[OR]] to i64
+ // CHECK: [[CMP:%.*]] = icmp eq i64 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestc_mask64_u8(_mm512_cmpneq_epu8_mask(__A, __B),
+ _mm512_cmpneq_epu8_mask(__C, __D));
+}
+
+unsigned char test_kortest_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) {
+ // CHECK-LABEL: @test_kortest_mask64_u8
+ // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <64 x i1> [[OR]] to i64
+ // CHECK: [[CMP:%.*]] = icmp eq i64 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ // CHECK: [[LHS2:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[RHS2:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+ // CHECK: [[OR2:%.*]] = or <64 x i1> [[LHS2]], [[RHS2]]
+ // CHECK: [[CAST2:%.*]] = bitcast <64 x i1> [[OR2]] to i64
+ // CHECK: [[CMP2:%.*]] = icmp eq i64 [[CAST2]], 0
+ // CHECK: [[ZEXT2:%.*]] = zext i1 [[CMP2]] to i32
+ // CHECK: trunc i32 [[ZEXT2]] to i8
+ return _kortest_mask64_u8(_mm512_cmpneq_epu8_mask(__A, __B),
+ _mm512_cmpneq_epu8_mask(__C, __D), CF);
+}
+
__mmask64 test_mm512_cmpeq_epi8_mask(__m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_cmpeq_epi8_mask
// CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}}
diff --git a/clang/test/CodeGen/avx512dq-builtins.c b/clang/test/CodeGen/avx512dq-builtins.c
index 0dd00491f4b..ee339a0f56f 100644
--- a/clang/test/CodeGen/avx512dq-builtins.c
+++ b/clang/test/CodeGen/avx512dq-builtins.c
@@ -68,6 +68,52 @@ __mmask8 test_kxor_mask8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m
__E, __F);
}
+unsigned char test_kortestz_mask8_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestz_mask8_u8
+ // CHECK: [[LHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[OR:%.*]] = or <8 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <8 x i1> [[OR]] to i8
+ // CHECK: [[CMP:%.*]] = icmp eq i8 [[CAST]], 0
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestz_mask8_u8(_mm512_cmpneq_epu64_mask(__A, __B),
+ _mm512_cmpneq_epu64_mask(__C, __D));
+}
+
+unsigned char test_kortestc_mask8_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestc_mask8_u8
+ // CHECK: [[LHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[OR:%.*]] = or <8 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <8 x i1> [[OR]] to i8
+ // CHECK: [[CMP:%.*]] = icmp eq i8 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestc_mask8_u8(_mm512_cmpneq_epu64_mask(__A, __B),
+ _mm512_cmpneq_epu64_mask(__C, __D));
+}
+
+unsigned char test_kortest_mask8_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) {
+ // CHECK-LABEL: @test_kortest_mask8_u8
+ // CHECK: [[LHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[OR:%.*]] = or <8 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <8 x i1> [[OR]] to i8
+ // CHECK: [[CMP:%.*]] = icmp eq i8 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ // CHECK: [[LHS2:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[RHS2:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // CHECK: [[OR2:%.*]] = or <8 x i1> [[LHS2]], [[RHS2]]
+ // CHECK: [[CAST2:%.*]] = bitcast <8 x i1> [[OR2]] to i8
+ // CHECK: [[CMP2:%.*]] = icmp eq i8 [[CAST2]], 0
+ // CHECK: [[ZEXT2:%.*]] = zext i1 [[CMP2]] to i32
+ // CHECK: trunc i32 [[ZEXT2]] to i8
+ return _kortest_mask8_u8(_mm512_cmpneq_epu64_mask(__A, __B),
+ _mm512_cmpneq_epu64_mask(__C, __D), CF);
+}
+
__m512i test_mm512_mullo_epi64 (__m512i __A, __m512i __B) {
// CHECK-LABEL: @test_mm512_mullo_epi64
// CHECK: mul <8 x i64>
diff --git a/clang/test/CodeGen/avx512f-builtins.c b/clang/test/CodeGen/avx512f-builtins.c
index 326d6d4432b..39ac42f25f2 100644
--- a/clang/test/CodeGen/avx512f-builtins.c
+++ b/clang/test/CodeGen/avx512f-builtins.c
@@ -8149,6 +8149,52 @@ int test_mm512_kortestz(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
_mm512_cmpneq_epu32_mask(__C, __D));
}
+unsigned char test_kortestz_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestz_mask16_u8
+ // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i16
+ // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], 0
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestz_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),
+ _mm512_cmpneq_epu32_mask(__C, __D));
+}
+
+unsigned char test_kortestc_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {
+ // CHECK-LABEL: @test_kortestc_mask16_u8
+ // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i16
+ // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ return _kortestc_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),
+ _mm512_cmpneq_epu32_mask(__C, __D));
+}
+
+unsigned char test_kortest_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) {
+ // CHECK-LABEL: @test_kortest_mask16_u8
+ // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]
+ // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i16
+ // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], -1
+ // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+ // CHECK: trunc i32 [[ZEXT]] to i8
+ // CHECK: [[LHS2:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[RHS2:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: [[OR2:%.*]] = or <16 x i1> [[LHS2]], [[RHS2]]
+ // CHECK: [[CAST2:%.*]] = bitcast <16 x i1> [[OR2]] to i16
+ // CHECK: [[CMP2:%.*]] = icmp eq i16 [[CAST2]], 0
+ // CHECK: [[ZEXT2:%.*]] = zext i1 [[CMP2]] to i32
+ // CHECK: trunc i32 [[ZEXT2]] to i8
+ return _kortest_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),
+ _mm512_cmpneq_epu32_mask(__C, __D), CF);
+}
+
__mmask16 test_mm512_kunpackb(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {
// CHECK-LABEL: @test_mm512_kunpackb
// CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
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