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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-11 09:59:17 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-11 09:59:17 +0000 |
| commit | cb2929c239b3221aa15f7cd449677dd285e818c7 (patch) | |
| tree | f407c2f005388159d13f56aaa033f415e6c94751 /clang/test | |
| parent | 279283c0649ab6e10c44a61ab6c6bc5c161c64ce (diff) | |
| download | bcm5719-llvm-cb2929c239b3221aa15f7cd449677dd285e818c7.tar.gz bcm5719-llvm-cb2929c239b3221aa15f7cd449677dd285e818c7.zip | |
[mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsics
The elements of the operands should be half the width of the elements of
the result.
llvm-svn: 190505
Diffstat (limited to 'clang/test')
| -rw-r--r-- | clang/test/CodeGen/builtins-mips-msa.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/clang/test/CodeGen/builtins-mips-msa.c b/clang/test/CodeGen/builtins-mips-msa.c index 4118b4a7b0c..a333f1e9a93 100644 --- a/clang/test/CodeGen/builtins-mips-msa.c +++ b/clang/test/CodeGen/builtins-mips-msa.c @@ -256,13 +256,13 @@ void test(void) { v4u32_r = __builtin_msa_div_u_w(v4u32_a, v4u32_b); // CHECK: call <4 x i32> @llvm.mips.div.u.w( v2u64_r = __builtin_msa_div_u_d(v2u64_a, v2u64_b); // CHECK: call <2 x i64> @llvm.mips.div.u.d( - v8i16_r = __builtin_msa_dotp_s_h(v8i16_a, v8i16_b); // CHECK: call <8 x i16> @llvm.mips.dotp.s.h( - v4i32_r = __builtin_msa_dotp_s_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.dotp.s.w( - v2i64_r = __builtin_msa_dotp_s_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.dotp.s.d( + v8i16_r = __builtin_msa_dotp_s_h(v16i8_a, v16i8_b); // CHECK: call <8 x i16> @llvm.mips.dotp.s.h( + v4i32_r = __builtin_msa_dotp_s_w(v8i16_a, v8i16_b); // CHECK: call <4 x i32> @llvm.mips.dotp.s.w( + v2i64_r = __builtin_msa_dotp_s_d(v4i32_a, v4i32_b); // CHECK: call <2 x i64> @llvm.mips.dotp.s.d( - v8u16_r = __builtin_msa_dotp_u_h(v8u16_a, v8u16_b); // CHECK: call <8 x i16> @llvm.mips.dotp.u.h( - v4u32_r = __builtin_msa_dotp_u_w(v4u32_a, v4u32_b); // CHECK: call <4 x i32> @llvm.mips.dotp.u.w( - v2u64_r = __builtin_msa_dotp_u_d(v2u64_a, v2u64_b); // CHECK: call <2 x i64> @llvm.mips.dotp.u.d( + v8u16_r = __builtin_msa_dotp_u_h(v16u8_a, v16u8_b); // CHECK: call <8 x i16> @llvm.mips.dotp.u.h( + v4u32_r = __builtin_msa_dotp_u_w(v8u16_a, v8u16_b); // CHECK: call <4 x i32> @llvm.mips.dotp.u.w( + v2u64_r = __builtin_msa_dotp_u_d(v4u32_a, v4u32_b); // CHECK: call <2 x i64> @llvm.mips.dotp.u.d( v8i16_r = __builtin_msa_dpadd_s_h(v8i16_r, v16i8_a, v16i8_b); // CHECK: call <8 x i16> @llvm.mips.dpadd.s.h( v4i32_r = __builtin_msa_dpadd_s_w(v4i32_r, v8i16_a, v8i16_b); // CHECK: call <4 x i32> @llvm.mips.dpadd.s.w( |
