[X86][AVX] Ensure vector non-temporal load/store intrinsics force pointer alignment (PR33830)

Clang specifies a max type alignment of 16 bytes on darwin targets (annoyingly in the driver not via cc1), meaning that the builtin nontemporal stores don't correctly align the loads/stores to 32 or 64 bytes when required, resulting in lowering to temporal unaligned loads/stores.

This patch casts the vectors to explicitly aligned types prior to the load/store to ensure that the require alignment is respected.

Differential Revision: https://reviews.llvm.org/D35996

llvm-svn: 309488

1 files changed, 3 insertions, 27 deletions

diff --git a/clang/test/CodeGen/x86-nontemporal.c b/clang/test/CodeGen/x86-nontemporal.c
index 5d809de7c67..5e9e42c9f20 100644
--- a/clang/test/CodeGen/x86-nontemporal.c
+++ b/clang/test/CodeGen/x86-nontemporal.c
@@ -1,12 +1,12 @@
 // RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK
 // RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK
 
-// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -emit-llvm -o - -Wall -Werror -fmax-type-align=16 | FileCheck %s --check-prefix=CHECK16
-// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -fno-signed-char -emit-llvm -o - -Wall -Werror -fmax-type-align=16 | FileCheck %s --check-prefix=CHECK16
+// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -emit-llvm -o - -Wall -Werror -fmax-type-align=16 | FileCheck %s --check-prefix=CHECK
+// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4.1 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -fno-signed-char -emit-llvm -o - -Wall -Werror -fmax-type-align=16 | FileCheck %s --check-prefix=CHECK
 
 #include <x86intrin.h>
 
-// FIXME: (PR33830) Tests showing failure to correctly align non-temporal load/stores on darwin targets where fmax-type-align is set to 16.
+// (PR33830) Tests ensure the correct alignment of non-temporal load/stores on darwin targets where fmax-type-align is set to 16.
 
 //
 // 128-bit vectors
@@ -43,36 +43,24 @@ __m128i test_mm_stream_load_si128(__m128i const *A) {
 void test_mm256_stream_pd(double* A, __m256d B) {
   // CHECK-LABEL: test_mm256_stream_pd
   // CHECK: store <4 x double> %{{.*}}, <4 x double>* %{{.*}}, align 32, !nontemporal
-
-  // CHECK16-LABEL: test_mm256_stream_pd
-  // CHECK16: store <4 x double> %{{.*}}, <4 x double>* %{{.*}}, align 16, !nontemporal
   _mm256_stream_pd(A, B);
 }
 
 void test_mm256_stream_ps(float* A, __m256 B) {
   // CHECK-LABEL: test_mm256_stream_ps
   // CHECK: store <8 x float> %{{.*}}, <8 x float>* %{{.*}}, align 32, !nontemporal
-
-  // CHECK16-LABEL: test_mm256_stream_ps
-  // CHECK16: store <8 x float> %{{.*}}, <8 x float>* %{{.*}}, align 16, !nontemporal
   _mm256_stream_ps(A, B);
 }
 
 void test_mm256_stream_si256(__m256i* A, __m256i B) {
   // CHECK-LABEL: test_mm256_stream_si256
   // CHECK: store <4 x i64> %{{.*}}, <4 x i64>* %{{.*}}, align 32, !nontemporal
-
-  // CHECK16-LABEL: test_mm256_stream_si256
-  // CHECK16: store <4 x i64> %{{.*}}, <4 x i64>* %{{.*}}, align 16, !nontemporal
   _mm256_stream_si256(A, B);
 }
 
 __m256i test_mm256_stream_load_si256(__m256i const *A) {
   // CHECK-LABEL: test_mm256_stream_load_si256
   // CHECK: load <4 x i64>, <4 x i64>* %{{.*}}, align 32, !nontemporal
-
-  // CHECK16-LABEL: test_mm256_stream_load_si256
-  // CHECK16: load <4 x i64>, <4 x i64>* %{{.*}}, align 16, !nontemporal
   return _mm256_stream_load_si256(A);
 }
 
@@ -83,35 +71,23 @@ __m256i test_mm256_stream_load_si256(__m256i const *A) {
 void test_mm512_stream_pd(double* A, __m512d B) {
   // CHECK-LABEL: test_mm512_stream_pd
   // CHECK: store <8 x double> %{{.*}}, <8 x double>* %{{.*}}, align 64, !nontemporal
-
-  // CHECK16-LABEL: test_mm512_stream_pd
-  // CHECK16: store <8 x double> %{{.*}}, <8 x double>* %{{.*}}, align 16, !nontemporal
   _mm512_stream_pd(A, B);
 }
 
 void test_mm512_stream_ps(float* A, __m512 B) {
   // CHECK-LABEL: test_mm512_stream_ps
   // CHECK: store <16 x float> %{{.*}}, <16 x float>* %{{.*}}, align 64, !nontemporal
-
-  // CHECK16-LABEL: test_mm512_stream_ps
-  // CHECK16: store <16 x float> %{{.*}}, <16 x float>* %{{.*}}, align 16, !nontemporal
   _mm512_stream_ps(A, B);
 }
 
 void test_mm512_stream_si512(__m512i* A, __m512i B) {
   // CHECK-LABEL: test_mm512_stream_si512
   // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 64, !nontemporal
-
-  // CHECK16-LABEL: test_mm512_stream_si512
-  // CHECK16: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 16, !nontemporal
   _mm512_stream_si512(A, B);
 }
 
 __m512i test_mm512_stream_load_si512(void *A) {
   // CHECK-LABEL: test_mm512_stream_load_si512
   // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 64, !nontemporal
-
-  // CHECK16-LABEL: test_mm512_stream_load_si512
-  // CHECK16: load <8 x i64>, <8 x i64>* %{{.*}}, align 16, !nontemporal
   return _mm512_stream_load_si512(A);
 }