diff options
author | Craig Topper <craig.topper@gmail.com> | 2016-02-29 06:51:38 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2016-02-29 06:51:38 +0000 |
commit | b4f83a00a937273abb4aaf589d87e859bd5f5285 (patch) | |
tree | ad6e0260a992bbe54b0a85952ddf9a9f2a0d1eec /clang/test | |
parent | 840927e074f40be0eecaf38542d9b57810952564 (diff) | |
download | bcm5719-llvm-b4f83a00a937273abb4aaf589d87e859bd5f5285.tar.gz bcm5719-llvm-b4f83a00a937273abb4aaf589d87e859bd5f5285.zip |
[X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi.
llvm-svn: 262201
Diffstat (limited to 'clang/test')
-rw-r--r-- | clang/test/CodeGen/attr-target-x86.c | 2 | ||||
-rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 4 | ||||
-rw-r--r-- | clang/test/Preprocessor/x86_target_features.c | 30 |
3 files changed, 35 insertions, 1 deletions
diff --git a/clang/test/CodeGen/attr-target-x86.c b/clang/test/CodeGen/attr-target-x86.c index 58e33d1cbfd..a113a94afbb 100644 --- a/clang/test/CodeGen/attr-target-x86.c +++ b/clang/test/CodeGen/attr-target-x86.c @@ -33,7 +33,7 @@ int __attribute__((target("no-mmx"))) qq(int a) { return 40; } // CHECK: qq{{.*}} #5 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt" -// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt" +// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt" // CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" // CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt,-aes" // CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,-3dnow,-3dnowa,-mmx" diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 1276ef0dfc6..873370ecb39 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -868,6 +868,8 @@ // CHECK_CNL_M32: #define __AVX512CD__ 1 // CHECK_CNL_M32: #define __AVX512DQ__ 1 // CHECK_CNL_M32: #define __AVX512F__ 1 +// CHECK_CNL_M32: #define __AVX512IFMA__ 1 +// CHECK_CNL_M32: #define __AVX512VBMI__ 1 // CHECK_CNL_M32: #define __AVX512VL__ 1 // CHECK_CNL_M32: #define __AVX__ 1 // CHECK_CNL_M32: #define __BMI2__ 1 @@ -904,6 +906,8 @@ // CHECK_CNL_M64: #define __AVX512CD__ 1 // CHECK_CNL_M64: #define __AVX512DQ__ 1 // CHECK_CNL_M64: #define __AVX512F__ 1 +// CHECK_CNL_M64: #define __AVX512IFMA__ 1 +// CHECK_CNL_M64: #define __AVX512VBMI__ 1 // CHECK_CNL_M64: #define __AVX512VL__ 1 // CHECK_CNL_M64: #define __AVX__ 1 // CHECK_CNL_M64: #define __BMI2__ 1 diff --git a/clang/test/Preprocessor/x86_target_features.c b/clang/test/Preprocessor/x86_target_features.c index 9c4192caf3f..1b5b795b6d5 100644 --- a/clang/test/Preprocessor/x86_target_features.c +++ b/clang/test/Preprocessor/x86_target_features.c @@ -178,6 +178,36 @@ // AVX512F2: #define __SSE__ 1 // AVX512F2: #define __SSSE3__ 1 +// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512ifma -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512IFMA %s + +// AVX512IFMA: #define __AVX2__ 1 +// AVX512IFMA: #define __AVX512F__ 1 +// AVX512IFMA: #define __AVX512IFMA__ 1 +// AVX512IFMA: #define __AVX__ 1 +// AVX512IFMA: #define __SSE2_MATH__ 1 +// AVX512IFMA: #define __SSE2__ 1 +// AVX512IFMA: #define __SSE3__ 1 +// AVX512IFMA: #define __SSE4_1__ 1 +// AVX512IFMA: #define __SSE4_2__ 1 +// AVX512IFMA: #define __SSE_MATH__ 1 +// AVX512IFMA: #define __SSE__ 1 +// AVX512IFMA: #define __SSSE3__ 1 + +// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512vbmi -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512VBMI %s + +// AVX512VBMI: #define __AVX2__ 1 +// AVX512VBMI: #define __AVX512F__ 1 +// AVX512VBMI: #define __AVX512VBMI__ 1 +// AVX512VBMI: #define __AVX__ 1 +// AVX512VBMI: #define __SSE2_MATH__ 1 +// AVX512VBMI: #define __SSE2__ 1 +// AVX512VBMI: #define __SSE3__ 1 +// AVX512VBMI: #define __SSE4_1__ 1 +// AVX512VBMI: #define __SSE4_2__ 1 +// AVX512VBMI: #define __SSE_MATH__ 1 +// AVX512VBMI: #define __SSE__ 1 +// AVX512VBMI: #define __SSSE3__ 1 + // RUN: %clang -target i386-unknown-unknown -march=atom -msse4.2 -x c -E -dM -o - %s | FileCheck --check-prefix=SSE42POPCNT %s // SSE42POPCNT: #define __POPCNT__ 1 |