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| author | Luke Geeson <luke.geeson@arm.com> | 2018-06-14 08:28:56 +0000 |
|---|---|---|
| committer | Luke Geeson <luke.geeson@arm.com> | 2018-06-14 08:28:56 +0000 |
| commit | 010bbbf390d085e8d517aa25574d74d3ffc68277 (patch) | |
| tree | 7a5875c3e6ebd0fe7efc07a8dab9ece8c0db19ba /clang/test | |
| parent | bfc340653022b00383c97db117719d15d20bdfa3 (diff) | |
| download | bcm5719-llvm-010bbbf390d085e8d517aa25574d74d3ffc68277.tar.gz bcm5719-llvm-010bbbf390d085e8d517aa25574d74d3ffc68277.zip | |
[AArch64] Added support for the vcvta_u16_f16 instrinsic for FP16 Armv8.2-A
llvm-svn: 334693
Diffstat (limited to 'clang/test')
| -rw-r--r-- | clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c | 7 | ||||
| -rw-r--r-- | clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c index 814a959152a..e1a2e3fb92d 100644 --- a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c +++ b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c @@ -164,6 +164,13 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) { return vcvta_s16_f16(a); } +// CHECK-LABEL: test_vcvta_u16_f16 +// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtau.v4i16.v4f16(<4 x half> %a) +// CHECK: ret <4 x i16> [[VCVT]] +int16x4_t test_vcvta_u16_f16 (float16x4_t a) { + return vcvta_u16_f16(a); +} + // CHECK-LABEL: test_vcvtaq_s16_f16 // CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtas.v8i16.v8f16(<8 x half> %a) // CHECK: ret <8 x i16> [[VCVT]] diff --git a/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c b/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c index f9c48deefe1..96f5efcab77 100644 --- a/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c +++ b/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c @@ -164,6 +164,13 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) { return vcvta_s16_f16(a); } +// CHECK-LABEL: test_vcvta_u16_f16 +// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.fcvtau.v4i16.v4f16(<4 x half> %a) +// CHECK: ret <4 x i16> [[VCVT]] +int16x4_t test_vcvta_u16_f16 (float16x4_t a) { + return vcvta_u16_f16(a); +} + // CHECK-LABEL: test_vcvtaq_s16_f16 // CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtas.v8i16.v8f16(<8 x half> %a) // CHECK: ret <8 x i16> [[VCVT]] |
