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author | Chad Rosier <mcrosier@apple.com> | 2011-06-24 19:23:04 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2011-06-24 19:23:04 +0000 |
commit | fa8d89327f2c3d2596c1f4fada5d58fe4e4792c2 (patch) | |
tree | 7178dcf4a450d266081ac955ebcc1667534475ce /clang/test/SemaCXX/nested-name-spec.cpp | |
parent | 1be944a466bfc4877255e0bfa095eda792542d08 (diff) | |
download | bcm5719-llvm-fa8d89327f2c3d2596c1f4fada5d58fe4e4792c2.tar.gz bcm5719-llvm-fa8d89327f2c3d2596c1f4fada5d58fe4e4792c2.zip |
The Neon VCVT (between floating-point and fixed-point, Advanced SIMD)
instructions can be used to match combinations of multiply/divide and VCVT
(between floating-point and integer, Advanced SIMD). Basically the VCVT
immediate operand that specifies the number of fraction bits corresponds to a
floating-point multiply or divide by the corresponding power of 2.
For example, VCVT (floating-point to fixed-point, Advanced SIMD) can replace a
combination of VMUL and VCVT (floating-point to integer) as follows:
Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
vmul.f32 d16, d17, d16
vcvt.s32.f32 d16, d16
becomes:
vcvt.s32.f32 d16, d16, #3
Similarly, VCVT (fixed-point to floating-point, Advanced SIMD) can replace a
combinations of VCVT (integer to floating-point) and VDIV as follows:
Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
vcvt.f32.s32 d16, d16
vdiv.f32 d16, d17, d16
becomes:
vcvt.f32.s32 d16, d16, #3
llvm-svn: 133813
Diffstat (limited to 'clang/test/SemaCXX/nested-name-spec.cpp')
0 files changed, 0 insertions, 0 deletions